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[188.141.3.146]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b61ca4d581sm12938939f8f.64.2025.07.22.03.37.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 22 Jul 2025 03:37:16 -0700 (PDT) Message-ID: <7e1073da-6773-489e-80f5-97409f013acc@linaro.org> Date: Tue, 22 Jul 2025 11:37:15 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] phy: qcom-mipi-csi2: Add a CSI2 MIPI D-PHY driver To: Neil Armstrong , Konrad Dybcio , Vladimir Zapolskiy , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250710-x1e-csi2-phy-v1-0-74acbb5b162b@linaro.org> <20250710-x1e-csi2-phy-v1-2-74acbb5b162b@linaro.org> <11b573d5-ce4d-476c-b94c-216d427cd838@linaro.org> <08261aa4-689b-4d6b-bfd2-221c1976d254@linaro.org> <0a12879f-dc4a-47fb-87a0-ac4b8bcd4d75@linaro.org> <53a19b1d-5665-4937-a07c-5dd1fcde06c5@linaro.org> <3b760685-97db-46e3-80a3-7fad69ad31cd@oss.qualcomm.com> <94b75177-9401-4e0c-966b-5847a29cb6f7@linaro.org> <427548c0-b0e3-4462-a15e-bd7843f00c7f@oss.qualcomm.com> <3UXVZ6ANM9mDjVdMV4SXsiIx_pT3S1lp3RC_Q7mh_o7jF2dpYsni1Sl2TAWv6OCMCRTFmi9aE6BxDquGkOnwEg==@protonmail.internalid> <8b908a20-0bf3-447d-82ea-a5ecee1bf54c@linaro.org> <57501e81-7e9c-4cb1-9a37-18307d1e06ca@linaro.org> <33d76d7f-ab14-4e76-8ffb-eb370901a046@linaro.org> <4edefe21-27b6-4884-befa-ddb451bb9376@linaro.org> <84eea632-02d8-4b7f-a4ca-36ce7159a170@linaro.org> From: Bryan O'Donoghue Content-Language: en-US In-Reply-To: <84eea632-02d8-4b7f-a4ca-36ce7159a170@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 22/07/2025 10:59, Neil Armstrong wrote: > On 22/07/2025 11:08, Bryan O'Donoghue wrote: >> On 22/07/2025 09:32, Neil Armstrong wrote: >>> The whole key point here is the combo mode, as I understood the combo >>> mode feature >>> makes the PHY lanes available as 2 separate streams, like if you got >>> 2 "controllers" >>> attached to the same PHY. So in fact, the PHY should have a single >>> node, but 2 PHY >>> interfaces in combo mode. >>> >>> This makes all this controller/phy model very complex to handle and >>> add a lot of >>> logic in the camss side. Moving the "csiphy" as an independent media >>> device that >>> can declare up to 2 endpoints in combo mode makes things much >>> simpler, and allows >>> us to attach each "csiphy" stream to any "controller" side of camss. >> >> I think there should be a generic extension to PHY/linux-media to >> support that instead of something Qualcomm specific. > > Can you point out what's missing ? AFAIK it's more a matter of proper > representation of all > the CAMSS components with a proper ports/endpoint graph design that > adding new kernel APIs. Perhaps I'm not understanding the pushback. Vlad's design puts the CSIPHY nodes under CAMSS and doesn't use the upstream PHY API, which if I've understood right is done to facilitate multiple sensors on the same CSIPHY. If the kernel APIs or standard representations of CSIPHYs in the upstream kernel are insufficent to facilitate this model, then I think that change should be done separately so that all of the existing upstream stuff can benefit. CAMSS should have a standard PHY interface. That's what this series provides. If multiple sensors on the CSIPHY can't fit into that standard model, then we need a series to rectify. I've given an example of how two sensors could be routed to one CSIPHY in DT. Another possibility is virtual channels. I don't know if your sensors support VCs, have you explored that ? If the message is "we need a custom PHY interface in CAMSS for multiple sensors" then I think in fact what that points to additional work that needs to be done in CAMSS and perhaps in the kernel linux-media and PHY layer to facilitate. Like I say I'm happy to help you guys do that, ship me some hardware. --- bod