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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8df8465cb5sm137854166b.40.2026.01.30.03.21.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Jan 2026 03:21:06 -0800 (PST) Message-ID: <7e61575a-3e0f-491d-ae22-89ab8bb21c91@oss.qualcomm.com> Date: Fri, 30 Jan 2026 12:21:03 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] PCI: qcom: Add D3cold support To: Krishna Chaitanya Chundru , Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Will Deacon Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jonathanh@nvidia.com References: <20260128-d3cold-v1-0-dd8f3f0ce824@oss.qualcomm.com> <20260128-d3cold-v1-3-dd8f3f0ce824@oss.qualcomm.com> <63531057-ea7c-4a87-9848-04e502bffc32@oss.qualcomm.com> <45e1c870-f155-4943-990d-5e75a1e8b998@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <45e1c870-f155-4943-990d-5e75a1e8b998@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: TTpSeQ5hWttiAkBNHXSXFbZdrJIp_G-X X-Authority-Analysis: v=2.4 cv=EvjfbCcA c=1 sm=1 tr=0 ts=697c9424 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=M7nLEK1OKNC5V3jzK1UA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-GUID: TTpSeQ5hWttiAkBNHXSXFbZdrJIp_G-X X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTMwMDA5MiBTYWx0ZWRfX6mC5TcvAnVfP fy3IFX+QwmEv2WXPVanSiPAfQMg1zT3b9f33wpvzU25DFLPXNn2+ML9+ZoQvozQocSLe9aOVSCD QmqsKO5wxKQ//DpmXmZgSUYuJGNztW+HGsHx/gjuW5SjEIqH9whvKbZ0xKcNqj3s4cYu+M1mFey 61PasilNTBuVD+1wpaldO+V48cfv3Lsxa0eim7sfXj0kqMtd/b0TG6Ix4qOTVoJgHacInP0v0F7 2X4rggQF2AA4kABv4QuHoMntDNwI8DJbe9lgq9A7C23/BcsaB4xH059M0XHJX+5/Qulocpllgl/ sPWgh6BPNIDcrKpefcuLEj7tliYp822YdQ17sG1gRRsp73oeWPJgqhIPoAHyPSDZtYtTdMbENDa wSFzMz2pM8HiC8iLjvdmaOd2zaNFmSL6MyIi6t6P6FF4DSFRGNink0xncJbEf+fuQ7+yHJhXQn3 /LRGbCEebs6ES06byQA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-30_01,2026-01-29_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 priorityscore=1501 bulkscore=0 suspectscore=0 adultscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601300092 On 1/29/26 6:27 AM, Krishna Chaitanya Chundru wrote: > > > On 1/28/2026 5:58 PM, Konrad Dybcio wrote: >> On 1/28/26 12:40 PM, Krishna Chaitanya Chundru wrote: >>> Add pme_turn_off() support and use DWC common suspend resume methods >>> for device D3cold entry & exit. If the device is not kept in D3cold >>> use existing methods like keeping icc votes, opp votes etc.. intact. >>> >>> In qcom_pcie_deinit_2_7_0(), explicitly disable PCIe clocks and resets >>> in the controller. >>> >>> Remove suspended flag from qcom_pcie structure as it is no longer needed. >>> >>> Signed-off-by: Krishna Chaitanya Chundru >>> --- >> [...] >> >>> +        /* >>> +         * Only disable CPU-PCIe interconnect path if the suspend is non-S2RAM. >>> +         * Because on some platforms, DBI access can happen very late during the >>> +         * S2RAM and a non-active CPU-PCIe interconnect path may lead to NoC >>> +         * error. >>> +         */ >> I think someone internally once tracked down what that access was > As per last debug which I have done few years back we see access coming IRQ driver to mask the interrupts > as part of disabling non boot CPU's. >> Can we fix that instead? > The only proper fix is to keep device in D3cold which this patch is doing. if some client drivers like NVMe > doesn't want to go D3cold we need to honor it, but Mani is working on it to allow NVMe drivers to go to D3cold. That doesn't sound right - if there's an unclocked access, we should either ensure that the PCIe controller is online for that write, or skip the write if it's not possible for $reasons Konrad