From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90E8C79F4; Sun, 11 Aug 2024 20:59:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723409971; cv=none; b=EU3lF+MKQjDk55nKZ3cZcyThIVPQh/R3S8mAReH72351KH5lGbWKPrrb7K/zoDoEF21Cl0xz4Je7dKTyrPvThAiZ4QMeKQW3qLvOFZcd6gTjB2a/fOdrYHa5FilujOv8+JVfQsXC6hqZ1gKYkkjFAefnZxLTKAKW3t6kjS7U8q8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723409971; c=relaxed/simple; bh=sfwU2UFIJdjH1CnBaOrSYQIvxbfGiL2gGLNqxqTag40=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=somVeAeguYuBlMGKeVSPaNdT+X6iw4+uRQbE53i9jjfpqlZQGsakwsYz0S1awPpwWZn3zKOU7xIUNc9pXwbeyRLYhXnq9XHE6hv39Mhexuv/YIvIE18IS4kpfyNECRirnJ2bU9rsj2YkUjktpbnf9tlbTFuPRgOv/avDjkc81/o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=wJZG8ZQv; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="wJZG8ZQv" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=tetulHRx1+SiKaVY4y0TSkhRbm+G3mEZPmNc10p7ZY4=; b=wJZG8ZQvMX0/OpsptrcS2Lj3RY I7DDb0cGWhTyYd63wQg86Y9H6/CevEfNI482WMjzrU5rkrB+Cod0eJWJy5ecyVp4pENwr9W887o0f lw4st7tfWHS7wmqSUY+eGjiEFYJuV1w/gq9khQeJ0TsEeubYawz33O627w6l2YyGENq8=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1sdFeo-004WMd-NP; Sun, 11 Aug 2024 22:59:18 +0200 Date: Sun, 11 Aug 2024 22:59:18 +0200 From: Andrew Lunn To: Linus Walleij Cc: Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Christian Marangi , Tim Harvey , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Subject: Re: [PATCH RFC v2] net: dsa: mv88e6xxx: Support LED control Message-ID: <7e874408-d125-4002-9ce3-ec2653fb6c46@lunn.ch> References: <20240810-mv88e6xxx-leds-v2-1-7417d5336686@linaro.org> <07b19b43-e8db-45c8-9b7f-1372753e6865@lunn.ch> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <07b19b43-e8db-45c8-9b7f-1372753e6865@lunn.ch> > You could also add a > mv88e6xxx_port_led_read(chip, port, *reg) > { > int err; > > err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_LED_CONTROL, reg); > *reg &= 0x3ff; > > return err; Actually, this wrong. You first need to write the register pointer number you want to read: err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_LED_CONTROL, ptr); if (err) return err; and then do a read, and mask the only the lower 10 bits, where the register value will be: err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_LED_CONTROL, val); *val &= 0x3ff; return err; Andrew