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Wed, 24 Apr 2024 08:00:13 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 43O80C76000642 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 24 Apr 2024 08:00:12 GMT Received: from [10.216.52.243] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 24 Apr 2024 01:00:07 -0700 Message-ID: <7ea10ef9-04f0-4786-bd34-551c065c4d9d@quicinc.com> Date: Wed, 24 Apr 2024 13:30:06 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration Content-Language: en-US To: Konrad Dybcio , Luca Weiss , , , , , , , , , , , , CC: , References: <20240416105650.2626-1-quic_vdadhani@quicinc.com> <886befb2-2be2-4db0-b205-b3d1043cde62@linaro.org> From: Viken Dadhaniya In-Reply-To: <886befb2-2be2-4db0-b205-b3d1043cde62@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Tn_AaSAN9zlOxOZVeDqfVPfjplIE5921 X-Proofpoint-ORIG-GUID: Tn_AaSAN9zlOxOZVeDqfVPfjplIE5921 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-04-24_05,2024-04-23_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 mlxlogscore=859 lowpriorityscore=0 malwarescore=0 bulkscore=0 spamscore=0 priorityscore=1501 adultscore=0 phishscore=0 mlxscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2404240034 On 4/16/2024 8:09 PM, Konrad Dybcio wrote: > > > On 4/16/24 13:38, Luca Weiss wrote: >> On Tue Apr 16, 2024 at 12:56 PM CEST, Viken Dadhaniya wrote: >>> Remove CTS and RTS pinctrl configuration for UART5 node as >>> it's designed for debug UART for all the board variants of the >>> sc7280 chipset. >>> >>> Also change compatible string to debug UART. >> >> This change has little to do with the SoC design though and is dependent >> on the usage on a given board, right? Also the QCM6490 datasheet >> mentions gpio21 & gpio22 can be used for UART_CTS and UART_RFR. > > Yeah, using it as a debug uart doesn't rule out flow control I don't think > >> >> But at least consistency-wise this change makes sense, in practically >> all other SoCs one UART is marked as geni-debug-uart. >> >> But with this patch you should then also remove some overrides that are >> placed in various boards already? >> >> arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts:     compatible = >> "qcom,geni-debug-uart"; >> arch/arm64/boot/dts/qcom/qcm6490-idp.dts:       compatible = >> "qcom,geni-debug-uart"; >> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts:   compatible = >> "qcom,geni-debug-uart"; >> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi:       compatible = >> "qcom,geni-debug-uart"; >> arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi:     compatible = >> "qcom,geni-debug-uart"; > > Definitely Updated in V2. > > Konrad