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Thu, 26 Feb 2026 20:32:13 +0100 (CET) Message-ID: <7ebcdc0200ad9ac0802e4839207e52d72f9af9aa.camel@collabora.com> Subject: Re: [PATCH v3 1/3] media: dt-bindings: rockchip,vdec: Add alternative reg-names order for RK35{76,88} From: Nicolas Dufresne To: Krzysztof Kozlowski , Cristian Ciocaltea , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Detlev Casanova , Ezequiel Garcia , Mauro Carvalho Chehab , Hans Verkuil Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Conor Dooley , linux-media@vger.kernel.org Date: Thu, 26 Feb 2026 14:32:11 -0500 In-Reply-To: <9bb74438-e759-46a7-9fa1-2c6b1fced76b@kernel.org> References: <20260225-vdec-reg-order-rk3576-v3-0-5a2ebe1b11a8@collabora.com> <20260225-vdec-reg-order-rk3576-v3-1-5a2ebe1b11a8@collabora.com> <9bb74438-e759-46a7-9fa1-2c6b1fced76b@kernel.org> Autocrypt: addr=nicolas.dufresne@collabora.com; prefer-encrypt=mutual; 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boundary="=-GomJ4AQ9DRoD/qLotM0n" User-Agent: Evolution 3.58.3 (3.58.3-1.fc43) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 --=-GomJ4AQ9DRoD/qLotM0n Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Le mercredi 25 f=C3=A9vrier 2026 =C3=A0 13:26 +0100, Krzysztof Kozlowski a = =C3=A9crit=C2=A0: > On 25/02/2026 13:19, Cristian Ciocaltea wrote: > > With the introduction of the RK3588 SoC, and RK3576 afterwards, the > > 'link' and 'cache' register blocks have been provided for the video > > decoder unit in addition to the existing 'function' one, which now show= s > > up in between them (from address-based ordering point of view). > >=20 > > However, the binding does not properly describe this hardware layout, a= s > > the new blocks are listed after the old one.=C2=A0 Therefore it breaks = the > > convention expecting the unit address to indicate the first register > > range. > >=20 > > Since the binding changes have been already released and a fix would > > bring up an ABI break, mark the current 'reg-names' listing as > > deprecated and introduce an alternative 'link,function,cache' one. > >=20 > > Additionally, drop the 'reg' description items as the order is not fixe= d > > anymore, while the information they offer is not very relevant anyway. > >=20 > > Signed-off-by: Cristian Ciocaltea > > --- > > =C2=A0.../devicetree/bindings/media/rockchip,vdec.yaml=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 | 19 ++++++++++++------- > > =C2=A01 file changed, 12 insertions(+), 7 deletions(-) > >=20 > > diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml= b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml > > index 809fda45b3bd..3f6072e8baa5 100644 > > --- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml > > +++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml > > @@ -28,16 +28,21 @@ properties: > > =C2=A0 > > =C2=A0=C2=A0 reg: > > =C2=A0=C2=A0=C2=A0=C2=A0 minItems: 1 > > -=C2=A0=C2=A0=C2=A0 items: > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - description: The function configurati= on registers base > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - description: The link table configura= tion registers base > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - description: The cache configuration = registers base > > +=C2=A0=C2=A0=C2=A0 maxItems: 3 > > =C2=A0 > > =C2=A0=C2=A0 reg-names: > > -=C2=A0=C2=A0=C2=A0 items: > > +=C2=A0=C2=A0=C2=A0 oneOf: > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: function >=20 > This is confusing, I think I missed that in previous patch because it > did not leave that part or I misread the diff hunk - why do you allow > one entry? >=20 > If the first entry is function, then all others MUST built on top, thus > this: >=20 > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: link > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: functi= on > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: cache >=20 > is not correct. >=20 > No, you don't change the orders. So again, if you have such binding, > then you just fix the unit address leaving the binding as is. We need a better solution, its really helpful for the base address in these= unit name matches the documentation. And specially with this version of the hard= ware, the link register is where you program the IP, the function registers are f= illed by the IP when the previous job completes (but can be access when there is = no running jobs for various reason too, hence exposing it). Nicolas p.s. I didn't read this message first, don't read by Rb as offending, I'll = hold as long as needed. >=20 >=20 > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: link > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: cache > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - items: > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: link > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: functi= on > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: cache > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - items: > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: functi= on > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: link > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - const: cache > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 deprecated: true > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 description: Use link,funct= ion,cache block order instead. > > =C2=A0 > Best regards, > Krzysztof --=-GomJ4AQ9DRoD/qLotM0n Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTvDVKBFcTDwhoEbxLZQZRRKWBy9AUCaaCfvAAKCRDZQZRRKWBy 9HpqAQDbpHxivpnNbaiKNBB2Wj7baGgUmfo4W5g7rJEyVOf2KwEArpUAgEYU4HGR tS7JVtGMiecpsCfIcEQ5zFoUMXMvFwQ= =7ewP -----END PGP SIGNATURE----- --=-GomJ4AQ9DRoD/qLotM0n--