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Tue, 30 Jul 2024 11:25:28 +0200 Message-ID: <7ed0f4dc-9865-4139-bd88-7ca270b9a466@web.de> Date: Tue, 30 Jul 2024 11:25:23 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird To: Herve Codina , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, Christophe Leroy , Conor Dooley , Krzysztof Kozlowski , Li Yang , Mark Brown , Qiang Zhao , Rob Herring Cc: LKML , Thomas Petazzoni References: <20240729142107.104574-15-herve.codina@bootlin.com> Subject: Re: [PATCH 14/36] soc: fsl: cpm1: tsa: Add support for QUICC Engine (QE) implementation Content-Language: en-GB From: Markus Elfring In-Reply-To: <20240729142107.104574-15-herve.codina@bootlin.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:Enr+kaZULtHao8xj1MEf/uKFDf7xcXnvnwHaPuDxNtdiZHuvaY1 faTKq0TSqBUp5PnbVfJHtSKkWkSvb14oZqqMrmafdm9no2GWN+cFWhjHN15JJxYtMz9Y+u+ rlbcI5vrBr9iXxgxveDoHTs1RKZ9xgqvf3m/bg2joG0pnQwCi/b1i14gAI/SZySsyF82FFS 2x8gGxTr1kypTc+y1/2nQ== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:m0k7Pq+00cY=;zaWDnDXkBAX0V6Qm/QR6xTJQWOt lAzDsi9PqBK3FR60RDK/jWhujt8nktX2uQqP+P1rZpIjM6bcrcbu7XF4jxeK7o5Dt223usX35 BBqN7NnPy3zRkbJ9sSQHLljufz3JvkdfSn112I6X0ooGDqUSYtQl9PTh6KkkFhWiUOETGeFgW XIZ5qSKnxOU76/JX5GRyBBVCvQGWTRPzbjJ66wkoKI4p8mGV26r2lJ3Q/8JLKvO0KUIg+EM12 uUeYj+q40/yNl2shqnpXHYqjZttEdqgsi7MFjoP0YJMcrqCVAgGLZtPdtQOeXMj8ak/5ejWRd ylynbfeCMHWELfdbyuewGClmsxHONIG0Esg1PAX4WOtCuX5bh42F0wREKEXMe5E287j822sHu 5i5XVkYFSbw9BGJkwDEb9GJaklRvCTM5JbRjCdiiH2QwW62Q0Ak9jalIolsECfVWMMQVqC01z Vcpolul3yrBMxSt7jqfO0jFdU+UBgZCIZ4L0NU5qfDtFvgJYGFasD4zivPogv1ONbg+qjTXPf 7UtYgTmnkEm86b7xm0BjmK72gKSCdUYlZxM3ThVuKcsYLn6mn7s5T1jyTEcXsVDZK5lCS7oM0 Sbx20VAB2q99Vx5shGWmbnNcbOIhaaefhqvszRRfSCy9FMxLTy6cZ1mkMFM4L+QlA7ghXjRdX +aGhCK0qr99HW+SvCxyFearKhmz5L16uGS53BatAUNTk4M05+aUJgjwvZHzKHQFRmAcuc0dLz E52BPCsWSgYAbpm4Dvr+4xqEgos82xxwSC/EsjogHDCNv26J98AWK8HRD8YwoHvSnpAC8v54f N2mHin7mhcn4fXhNJ1jmq+Bg== =E2=80=A6 > +++ b/drivers/soc/fsl/qe/tsa.c =E2=80=A6 > +static int tsa_qe_serial_connect(struct tsa_serial *tsa_serial, bool co= nnect) > +{ =E2=80=A6 > + spin_lock_irqsave(&tsa->lock, flags); > + ret =3D ucc_set_qe_mux_tsa(ucc_num, connect); > + spin_unlock_irqrestore(&tsa->lock, flags); =E2=80=A6 Under which circumstances would you become interested to apply a statement like =E2=80=9Cguard(spinlock_irqsave)(&tsa->lock);=E2=80=9D? https://elixir.bootlin.com/linux/v6.11-rc1/source/include/linux/spinlock.h= #L572 Regards, Markus