Re: [PATCH v7 0/6] memory: tegra: Add MC error logging support for Tegra264 SoC

[Ketan Patil <ketanp@nvidia.com>]

On 07/03/26 22:30, Krzysztof Kozlowski wrote:
> External email: Use caution opening links or attachments
>
>
> On 26/02/2026 17:31, Ketan Patil wrote:
>> In Tegra264, different components from memory subsystems like Memory
>> Controller Fabric (MCF), HUB, HUB Common (HUBC), Side Band Shim (SBS)
>> and MC Channels have different interrupt lines for receiving memory
>> controller error interrupts. This patch set includes changes to add
>> support and enable Memory Controller error logging for Tegra264.
>>
>> Ketan Patil (6):
>>    memory: tegra: Group error handling related registers
>>    memory: tegra: Group register and fields
>>    memory: tegra: Add support for multiple IRQs
>>    memory: tegra: Group SoC specific fields
>>    memory: tegra: Prepare for supporting multiple intmask registers
>>    memory: tegra: Add MC error logging support for Tegra264
>>
> Please use checkpatch. You should run it, not the maintainer.
>
> CHECK: Alignment should match open parenthesis
> CHECK: Please don't use multiple blank lines


Thanks Krzysztof for applying the patches.

Actually, I ran the checkpatch before sending the patches but did not 
see any issues. But, I did not run it with --strict option.

These errors are seen only with --strict option. I will make sure to use 
this option for any future patches.


>
> Best regards,
> Krzysztof