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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aac0f06607dsm1491416066b.186.2024.12.30.07.56.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 30 Dec 2024 07:56:48 -0800 (PST) Message-ID: <7f297ec0-fe67-4f5e-88d2-f55cadfea62d@oss.qualcomm.com> Date: Mon, 30 Dec 2024 16:56:47 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: qcs8300: Add support for clock controllers To: Imran Shaik , Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , Satya Priya Kakitapalli , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c736@quicinc.com> <802d32f1-ff7e-4d61-83f1-f804ee1750ed@oss.qualcomm.com> <57ce6574-b8e8-4523-9a97-6946fad59b35@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <57ce6574-b8e8-4523-9a97-6946fad59b35@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: nNnvSF3PJVg4lGtOObIorVLpnOvchlt_ X-Proofpoint-ORIG-GUID: nNnvSF3PJVg4lGtOObIorVLpnOvchlt_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 bulkscore=0 phishscore=0 malwarescore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 mlxlogscore=999 suspectscore=0 clxscore=1015 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412300138 On 6.12.2024 7:39 AM, Imran Shaik wrote: > > > On 11/30/2024 8:07 PM, Konrad Dybcio wrote: >> On 14.11.2024 12:05 PM, Imran Shaik wrote: >>> Add support for GPU, Video, Camera and Display clock controllers on >>> Qualcomm QCS8300 platform. >>> >>> Signed-off-by: Imran Shaik >>> --- >>> Please note that this series is dependent on [1] and [2], which adds support >>> for QCS8300 initial device tree and QCS8300 multi media clock controllers respectively. >>> >>> [1] https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2a42@quicinc.com/ >>> [2] https://lore.kernel.org/all/20241106-qcs8300-mm-patches-v3-0-f611a8f87f15@quicinc.com/ >>> --- >>> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 59 +++++++++++++++++++++++++++++++++++ >>> 1 file changed, 59 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi >>> index 2c35f96c3f28..e43fada4acb5 100644 >>> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi >>> @@ -5,6 +5,10 @@ >>> >>> #include >>> #include >>> +#include >>> +#include >>> +#include >>> +#include >>> #include >>> #include >>> #include >>> @@ -772,6 +776,20 @@ lpass_ag_noc: interconnect@3c40000 { >>> qcom,bcm-voters = <&apps_bcm_voter>; >>> }; >>> >>> + gpucc: clock-controller@3d90000 { >>> + compatible = "qcom,qcs8300-gpucc"; >>> + reg = <0x0 0x03d90000 0x0 0xa000>; >>> + clocks = <&rpmhcc RPMH_CXO_CLK>, >> >> Missing AHB clock >> > > We are re-using the qcom,gpucc.yaml bindings for the QCS8300, which doesn't have > the AHB clock. Hence, followed the same approach as all other latest targets. > >>> + <&gcc GCC_GPU_GPLL0_CLK_SRC>, >>> + <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; >>> + clock-names = "bi_tcxo", >>> + "gcc_gpu_gpll0_clk_src", >>> + "gcc_gpu_gpll0_div_clk_src"; >>> + #clock-cells = <1>; >>> + #reset-cells = <1>; >>> + #power-domain-cells = <1>; >>> + }; >>> + >>> pmu@9091000 { >>> compatible = "qcom,qcs8300-llcc-bwmon", "qcom,sc7280-llcc-bwmon"; >>> reg = <0x0 0x9091000 0x0 0x1000>; >>> @@ -882,6 +900,47 @@ gem_noc: interconnect@9100000 { >>> qcom,bcm-voters = <&apps_bcm_voter>; >>> }; >>> >>> + videocc: clock-controller@abf0000 { >>> + compatible = "qcom,qcs8300-videocc"; >>> + reg = <0x0 0x0abf0000 0x0 0x10000>; >>> + clocks = <&gcc GCC_VIDEO_AHB_CLK>, >> >> And the ones you reference here and below are not registered with >> the clock framework.. >> > > Yes, but these clocks are kept always-on from GCC driver probe. Ah, ok then Konrad