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a="2942562" X-IronPort-AV: E=Sophos;i="6.27,203,1787036400"; d="scan'208";a="2942562" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Nov 2026 23:34:44 -0800 X-CSE-ConnectionGUID: JKbjXGVcQzGXy9xbUZOcUQ== X-CSE-MsgGUID: XqqTaNZ8QXK0GbtMWu8PVw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,203,1787036400"; d="scan'208";a="7847193" Received: from unknown (HELO [10.238.0.90]) ([10.238.0.90]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Nov 2026 23:34:42 -0800 Message-ID: <7f86b03e-1c99-44ed-8d07-3502a21821fc@linux.intel.com> Date: Mon, 9 Nov 2026 15:34:40 +0800 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Cc: baolu.lu@linux.intel.com, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH 1/2] iommu/vt-d: Set FPD when tearing down a PASID entry with fault_ignore To: Vinicius Costa Gomes , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian References: <20261104051059.1345010-1-baolu.lu@linux.intel.com> <20261104051059.1345010-2-baolu.lu@linux.intel.com> <87o6c3uedj.fsf@intel.com> Content-Language: en-US From: Baolu Lu In-Reply-To: <87o6c3uedj.fsf@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 11/6/2026 6:01 AM, Vinicius Costa Gomes wrote: > Lu Baolu writes: > >> static void >> pasid_cache_invalidation_with_pasid(struct intel_iommu *iommu, >> u16 did, u32 pasid) >> @@ -253,7 +238,6 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev, >> >> if (!pasid_pte_is_present(pte)) { >> if (!pasid_pte_is_fault_disabled(pte)) { >> - WARN_ON(READ_ONCE(pte->val[0]) != 0); >> spin_unlock(&iommu->lock); >> return; >> } >> @@ -266,6 +250,8 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev, >> */ >> pasid_clear_entry(pte); >> spin_unlock(&iommu->lock); >> + if (!ecap_coherent(iommu->ecap)) >> + clflush_cache_range(pte, sizeof(*pte)); >> intel_iommu_drain_pasid_prq(dev, pasid); >> > I think it's worth documenting in the commit message why both of these > are needed, removing the warning and adding the flush. Yes. I will add the following to the commit message: Also drop the WARN_ON() for a non-present entry without FPD. Since commit 75ed00055c05 a concurrent teardown can see such an entry before it is zeroed. Flush the cache after clearing an FPD-only entry, as other PASID entry updates do on non-coherent hardware. Thanks, baolu