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Wed, 2 Oct 2024 20:42:40 +0800 Received: from [172.21.84.99] (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 2 Oct 2024 20:42:40 +0800 Message-ID: <7faeac1b-0b7a-a820-16a5-330b82d12e01@mediatek.com> Date: Wed, 2 Oct 2024 20:42:38 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH 2/9] arm64: dts: mediatek: mt8188: Add PCIe nodes Content-Language: en-US To: Fei Shao , AngeloGioacchino Del Regno , , , CC: Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , , , , , Bear Wang , Pablo Sun References: <20241002114614.847553-1-fshao@chromium.org> <20241002114614.847553-3-fshao@chromium.org> From: Macpaul Lin In-Reply-To: <20241002114614.847553-3-fshao@chromium.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit On 10/2/24 19:41, Fei Shao wrote: > > > External email : Please do not click links or open attachments until you > have verified the sender or the content. > > > Add PCIe node and the associated PHY node. > Individual board device tree should enable the nodes as needed. > > Signed-off-by: Fei Shao > --- > > arch/arm64/boot/dts/mediatek/mt8188.dtsi | 62 ++++++++++++++++++++++++ > 1 file changed, 62 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi > index 10195a4e4e9d..9431f3c5c228 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi > @@ -1763,6 +1763,53 @@ xhci0: usb@112b0000 { > status = "disabled"; > }; > > + pcie: pcie@112f0000 { > + compatible = "mediatek,mt8188-pcie", "mediatek,mt8192-pcie"; > + reg = <0 0x112f0000 0 0x2000>; > + reg-names = "pcie-mac"; It seems the property 'linux,pci-domain = <0>;' is missing? [snip] > + }; > + }; > + > nor_flash: spi@1132c000 { > compatible = "mediatek,mt8188-nor", "mediatek,mt8186-nor"; > reg = <0 0x1132c000 0 0x1000>; > @@ -1775,6 +1822,21 @@ nor_flash: spi@1132c000 { > status = "disabled"; > }; > > + pciephy: t-phy@11c20700 { > + compatible = "mediatek,mt8188-tphy", "mediatek,generic-tphy-v3"; > + ranges = <0 0 0x11c20700 0x700>; > + #address-cells = <1>; > + #size-cells = <1>; > + status = "disabled"; > + The power-domains property is missing. It should be 'power-domains = <&spm MT8188_POWER_DOMAIN_PEXTP_PHY_TOP>;' > + pcieport: pcie-phy@0 { > + reg = <0 0x700>; > + clocks = <&topckgen CLK_TOP_CFGREG_F_PCIE_PHY_REF>; > + clock-names = "ref"; > + #phy-cells = <1>; > + }; > + }; > + > i2c1: i2c@11e00000 { > compatible = "mediatek,mt8188-i2c"; > reg = <0 0x11e00000 0 0x1000>, Thanks! Best regards, Macpaul Lin