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Mon, 30 Mar 2026 07:39:58 -0700 (PDT) X-Received: by 2002:a17:902:f542:b0:2aa:d5e5:b136 with SMTP id d9443c01a7336-2b0cdd7bb09mr134148525ad.38.1774881598074; Mon, 30 Mar 2026 07:39:58 -0700 (PDT) Received: from [10.217.223.121] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b24264292asm86567855ad.4.2026.03.30.07.39.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 30 Mar 2026 07:39:57 -0700 (PDT) Message-ID: <7fbd9d3f-a313-40dd-9335-799aea5a077a@oss.qualcomm.com> Date: Mon, 30 Mar 2026 20:09:51 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 2/3] ufs: host: Add ICE clock scaling during UFS clock changes To: Abhinaba Rakshit , Herbert Xu , "David S. Miller" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Neeraj Soni Cc: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org References: <20260302-enable-ufs-ice-clock-scaling-v7-0-669b96ecadd8@oss.qualcomm.com> <20260302-enable-ufs-ice-clock-scaling-v7-2-669b96ecadd8@oss.qualcomm.com> Content-Language: en-US From: Harshal Dev In-Reply-To: <20260302-enable-ufs-ice-clock-scaling-v7-2-669b96ecadd8@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=IJoPywvG c=1 sm=1 tr=0 ts=69ca8b3f cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=vKCOo-aWrrhi_IfDXuIA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-GUID: 42l7AYS7L-xbi3XVE7ijrbgc-waldWup X-Proofpoint-ORIG-GUID: 42l7AYS7L-xbi3XVE7ijrbgc-waldWup X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzMwMDExNCBTYWx0ZWRfX5JxnVkg+2+iq x+2sn28NgeLWGgkSEIsYpY5GMBheGaRVBs9YysJ8iWM6z6ajSbUW7/T2DlR5jTOY4ifaVmqxRaI nDh2I+y725TNSRKPsF/T1s7lvHS+EST7dMD0R7MBD/IkN2BwfHGvWoU7CRvhzm3VVAkp32BrtvX +YxtoSqh+San2xu7UwFgbeTg9jJfdyfaPKN8M3xA39oVB9J/J4ERaNSNgwNrkjEJNndYwMYZleb rOXDIeN+p/5rqsjtQh5k3StS+sMUA97tr1KKt1cZ279TLtQ6L3+BgxEJq9wC1mcT00w3lPs6Zzu ldJGKpYX8YmSLNF85vwB6dHrpRoej5N7G9BV7cP6tRCsrmgF0xBV8+gyWOMGvpiqWkacrG1cMNT JYM5qC0pkuOi7EKD4alN4hWPhWT/QM2Ji2S2AILIUpt3WidYM4pIJ8BPKKsR5SQLihIOwNLPabt /EIyxDwB9YuZZCoJMnw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-29_05,2026-03-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603300114 Hi Abhinaba, On 3/2/2026 4:19 PM, Abhinaba Rakshit wrote: > Implement ICE (Inline Crypto Engine) clock scaling in sync with > UFS controller clock scaling. This ensures that the ICE operates at > an appropriate frequency when the UFS clocks are scaled up or down, > improving performance and maintaining stability for crypto operations. > > For scale_up operation ensure to pass ~round_ceil (round_floor) > and vice-versa for scale_down operations. > > Incase of OPP scaling is not supported by ICE, ensure to not prevent > devfreq for UFS, as ICE OPP-table is optional. > > Acked-by: Manivannan Sadhasivam > Signed-off-by: Abhinaba Rakshit > --- > drivers/ufs/host/ufs-qcom.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c > index 8d119b3223cbdaa3297d2beabced0962a1a847d5..776444f46fe5f00f947e4b0b4dfe6d64e2ad2150 100644 > --- a/drivers/ufs/host/ufs-qcom.c > +++ b/drivers/ufs/host/ufs-qcom.c > @@ -305,6 +305,15 @@ static int ufs_qcom_ice_prepare_key(struct blk_crypto_profile *profile, > return qcom_ice_prepare_key(host->ice, lt_key, lt_key_size, eph_key); > } > > +static int ufs_qcom_ice_scale_clk(struct ufs_qcom_host *host, unsigned long target_freq, > + bool round_ceil) > +{ > + if (host->hba->caps & UFSHCD_CAP_CRYPTO) > + return qcom_ice_scale_clk(host->ice, target_freq, round_ceil); > + > + return 0; > +} > + > static const struct blk_crypto_ll_ops ufs_qcom_crypto_ops = { > .keyslot_program = ufs_qcom_ice_keyslot_program, > .keyslot_evict = ufs_qcom_ice_keyslot_evict, > @@ -339,6 +348,12 @@ static void ufs_qcom_config_ice_allocator(struct ufs_qcom_host *host) > { > } > > +static int ufs_qcom_ice_scale_clk(struct ufs_qcom_host *host, unsigned long target_freq, > + bool round_ceil) > +{ > + return 0; > +} > + > #endif > > static void ufs_qcom_disable_lane_clks(struct ufs_qcom_host *host) > @@ -1646,8 +1661,10 @@ static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, bool scale_up, > else > err = ufs_qcom_clk_scale_down_post_change(hba, target_freq); > > + if (!err) > + err = ufs_qcom_ice_scale_clk(host, target_freq, !scale_up); > > - if (err) { > + if (err && err != -EOPNOTSUPP) { Using -EOPNOTSUPP here works fine for now. But anyone touching any of the lower APIs called by ufs_qcom_clk_scale_up/down_post_change() needs to ensure they don't return -EOPNOTSUPP, otherwise hibernate exit will be skipped. So this carries a minor risk of breaking. Since regardless of whether ufs_qcom_clk_scale_up/down_post_change() fails or ufs_qcom_ice_scale_clk() fails, we exit from hibernate and return from this function, I suggest you handle the error for ice_scale separately. > ufshcd_uic_hibern8_exit(hba); > return err; > } > Add the call to ufs_qcom_ice_scale_clk() along with error handle here, and let the above error handle remain untouched. err = ufs_qcom_ice_scale_clk(host, target_freq, !scale_up); if (err && err != -EOPNOTSUPP) { ufshcd_uic_hibern8_exit(hba); return err; } Regards, Harshal