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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b48652a9e66sm1369754066b.14.2025.10.07.06.23.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Oct 2025 06:23:20 -0700 (PDT) Message-ID: <80036e24-fb91-4bef-82e0-55b83799765a@oss.qualcomm.com> Date: Tue, 7 Oct 2025 15:23:18 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 5/8] media: iris: Move vpu register defines to common header file To: Vishnu Reddy , Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250925-knp_video-v1-0-e323c0b3c0cd@oss.qualcomm.com> <20250925-knp_video-v1-5-e323c0b3c0cd@oss.qualcomm.com> <96aca644-8fdc-8076-c94b-ed655ac526d2@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <96aca644-8fdc-8076-c94b-ed655ac526d2@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: _uzHLp3GrbYeiyvS2Bw2Ja_vloJBZ82L X-Authority-Analysis: v=2.4 cv=T8aBjvKQ c=1 sm=1 tr=0 ts=68e5144b cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=YqhKWhOh7Lw7mRpZfF0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: _uzHLp3GrbYeiyvS2Bw2Ja_vloJBZ82L X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA2MDEyMyBTYWx0ZWRfXygbS/slGzW41 bR3rQwtmli+xw1Pe5qxIICjIaJFafURE6kOxDptq64JgkkhK1T2ob0EZBTUIz2pic44RimSF6/+ CQaJ8Rvdm86pCRkEaz/TOQUNMcQtm9oOmMyunQ77Ejp2MgZ9y/lG5ShbfugBW5weMEla5x0Usc1 W0o085Us18An3gQx82414yXy3j9UJX0a8OHOTJElNTlD5ZwjWhFnSF+ABSx0WAO56voogcpmv9E eeRROnLwQWwJqLQdgvK92if2anR5cijnrGg1bgs8nCc8d2dUCf8JRMy1qyFzwUEvx40Qm+Ccl8K E0TGTap2WSm2Ye/5z71jJqyxl7oCiOdLZp2e39orMXI/BTIRb8S/nJapNl6Zare4MpnB84JvBm0 AB6ioCQ553mn3wwwCW/dwCEkazSt2g== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-07_01,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 phishscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2510060123 On 9/29/25 7:44 AM, Vishnu Reddy wrote: > > > On 9/25/2025 2:40 PM, Konrad Dybcio wrote: >> On 9/25/25 1:14 AM, Vikash Garodia wrote: >>> Some of vpu4 register defines are common with vpu3x. Move those into the >>> common register defines header. This is done to reuse the defines for >>> vpu4 in subsequent patch which enables the power sequence for vpu4. >>> >>> Co-developed-by: Vishnu Reddy >>> Signed-off-by: Vishnu Reddy >>> Signed-off-by: Vikash Garodia >>> --- >>>   drivers/media/platform/qcom/iris/iris_vpu3x.c      | 36 ---------------------- >>>   drivers/media/platform/qcom/iris/iris_vpu_common.c | 23 -------------- >>>   .../platform/qcom/iris/iris_vpu_register_defines.h | 29 +++++++++++++++++ >> >> This is a slippery slope. I think it's better if you explicitly say >> the header file contains the register map of VPU3 instead, as let's say >> VPU5 may add a random register in the middle (pushing some existing ones >> +0x4 down). Such changes are annoying to debug, and we've unfortunately >> been there on Adreno.. >> >> Because you're using this for a single common function that is both acting >> upon the same registers and performing the same operations on them across >> VPU35 and VPU4, it's okay to de-static-ize the function from iris_vpu3.c and >> refer to it from vpu4 ops, keeping the register map private to the former >> file which I think will end up less error-prone for the future. >> >> Konrad > >  Just to confirm >  1. You’re saying it’s better to keep the register definitions for each >  VPU generation in their own source files, instead of keeping them all >  in a shared header. Is that right? > >  2. The vpu functions (power on controller, power off controller and >  etc.) which are common for vpu3x and vpu4x are moved to >  iris_vpu_common.c and de-static-ize to use for both vpu3x and vpu4x. >  (This code changes are there in [PATCH 6/8] media: iris: Move vpu35 >  specific api to common to use for vpu4) > >  Will this 2nd point is fine or Do I need the keep the functions also >  in the platform specific file and reuse for vpu4x by de-static-ize the >  function in iris_vpu3x.c? I think we can drop this since Vikash said it's not going to change much for the forseeable future Konrad