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[83.9.1.44]) by smtp.gmail.com with ESMTPSA id g6-20020a056512118600b004971a83f839sm1587237lfr.39.2022.12.12.02.23.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Dec 2022 02:23:52 -0800 (PST) Message-ID: <80168963-0e17-e8aa-6d99-a1c53f63c934@linaro.org> Date: Mon, 12 Dec 2022 11:23:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.1 Subject: Re: [PATCH 2/3] arm64: dts: qcom: sm8150: Add DISPCC node Content-Language: en-US To: Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Rob Clark , Abhinav Kumar , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20221212093315.11390-1-konrad.dybcio@linaro.org> <20221212093315.11390-2-konrad.dybcio@linaro.org> From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12.12.2022 11:18, Dmitry Baryshkov wrote: > > > On 12 December 2022 12:33:13 GMT+03:00, Konrad Dybcio wrote: >> Years after the SoC support has been added, it's high time for it to >> get dispcc going. Add the node to ensure that. >> >> Signed-off-by: Konrad Dybcio >> --- >> arch/arm64/boot/dts/qcom/sm8150.dtsi | 26 ++++++++++++++++++++++++++ >> 1 file changed, 26 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi >> index a0c57fb798d3..ff04397777f4 100644 >> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi >> @@ -3579,6 +3579,32 @@ camnoc_virt: interconnect@ac00000 { >> qcom,bcm-voters = <&apps_bcm_voter>; >> }; >> >> + dispcc: clock-controller@af00000 { >> + compatible = "qcom,sm8150-dispcc"; >> + reg = <0 0x0af00000 0 0x10000>; >> + clocks = <&rpmhcc RPMH_CXO_CLK>, >> + <0>, >> + <0>, >> + <0>, >> + <0>, >> + <0>, >> + <0>; >> + clock-names = "bi_tcxo", >> + "dsi0_phy_pll_out_byteclk", >> + "dsi0_phy_pll_out_dsiclk", >> + "dsi1_phy_pll_out_byteclk", >> + "dsi1_phy_pll_out_dsiclk", >> + "dp_phy_pll_link_clk", >> + "dp_phy_pll_vco_div_clk"; >> + #clock-cells = <1>; >> + #reset-cells = <1>; >> + #power-domain-cells = <1>; >> + >> + power-domains = <&rpmhpd SM8150_MMCX>; >> + /* TODO: Maybe rpmhpd_opp_min_svs could work as well? */ >> + required-opps = <&rpmhpd_opp_low_svs>; > > Is it required for the dispcc, for the DSI or for the dpu? We have stumbled upon the similar issue when working on the 8350, see the latest Robert's patchset. While I don't have any hard evidence, it seems like it is required for any "interesting" multimedia components, AFAIU even including video and camera clocks.. Seems like it's a deep down dependency for a lot of things on this particular SoC (and likely also on newer ones, remember the initial mess with 8250 mmcx?) Konrad > > >> + }; >> + >> pdc: interrupt-controller@b220000 { >> compatible = "qcom,sm8150-pdc", "qcom,pdc"; >> reg = <0 0x0b220000 0 0x400>; >