From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from casper.infradead.org (casper.infradead.org [90.155.50.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F081145A2B0; Wed, 2 Sep 2026 22:39:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.50.34 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788388774; cv=none; b=SDR6CgrJbgRzXztMQUCVqUWaqz22ZVafiY6Ly72zm2zU56+acqjVaJ+LJpXPc2tspkRn6QmVGBLXWueVBJe0mQRzbq3gVEvJYKwi+mMVxA5D31y3TiNJzr4A8eHSiewwi3ieS7SXQHh/Ya61/6xhP52WAwLoQ1T8qkxMSGcEq8E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788388774; c=relaxed/simple; bh=vmwhOza0xXkHDP9WzBaFOcaSOAX9FHHsji3vVPFmIvU=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:MIME-Version; b=CzSST8MgD8wAHUHuudlZgh9AQPOoCN3BxeDlLEzmKI5n1cT5hclUcFBC6G0Z7JaufVtF88N4Fk9fSVbgcgIc0YMrb5X1bMtX3bT0xE/lsXdPGaqKZW3+F0k2CK+isrdtH/FLsxGevG9oi8/g0rwW9CRLXw9M3m28t+Hm+N1UHfw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=casper.srs.infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=FOpOmvuC; arc=none smtp.client-ip=90.155.50.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=casper.srs.infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="FOpOmvuC" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=vmwhOza0xXkHDP9WzBaFOcaSOAX9FHHsji3vVPFmIvU=; b=FOpOmvuCB+mcNgBWR6ylrw6CkW h+wMX1Ey6FiIweG3eJL/D7p88+gp9JbuaoUqSfAh0KYjxqxDm96NB178qLlo1xh6zqO36tbgjkMLT VHZjRbDtaBZDeH26iW09K2p1rrVdLO60iJ45kMCEE5bsIHsmyp6eNAbq4DbgdWFuspd81yuWABGj7 dw9b85JqKfYNDTFqgvo3rc0Mrjx8N7ehgtFvDxpmUle54P0FeuAz5ys0RLXszDSekpvvQa0np61Sa h3KDBR/njAQ6NPL8GVGyL2P7BFRSnKcWy3ossIPaPyyZOxFyx3fu46vqTkaQ3VCDTx/pZFbDOlfpG qZttflEQ==; Received: from [2001:8b0:10b:5:a7b1:57c5:dd61:87e3] (helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1x1tc1-000000088U5-03xo; Wed, 02 Sep 2026 22:39:21 +0000 Message-ID: <801fc0b175d582756d4ee6cf9adea5c1f9d61501.camel@infradead.org> Subject: Re: [PATCH] KVM: x86/mmu: Always guard rmaps with mmu_lock on PREEMPT_RT=y kernels From: David Woodhouse To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Date: Wed, 02 Sep 2026 23:38:58 +0100 In-Reply-To: <20260902211759.2700289-1-seanjc@google.com> References: <20260902211759.2700289-1-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-XiVkt5Jod9QdoQAa54/h" User-Agent: Evolution 3.60.3-0ubuntu1~ppa9~24.04 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html --=-XiVkt5Jod9QdoQAa54/h Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2026-09-02 at 14:17 -0700, Sean Christopherson wrote: > For all intents and purposes, revert KVM's ability to walk rmaps outside = of > mmu_lock when running on a realtime (PREEMPT_RT=3Dy) kernel.=C2=A0 I.e. d= on't use > a non-sleepable bit-spinlock to protect rmap entries, as realtime kernels > are highly unlikely to benefit from increased aging throughput and reduce= d > jitter for memory-overcommitted nested VMs, whereas using a non-sleepable > lock is currently buggy and goes against the spirit of realtime kernels. >=20 > Because KVM's rmap locks are hand-crafted bit-spinlocks, preemption must = be > disabled before acquiring the lock, otherwise a preempted lock holder wil= l > result in all other walkers of the locked rmap to spin and wait, with no > tracked owner for PI to boost.=C2=A0 For non-RT kernels, acquiring mmu_lo= ck > suffices, as mmu_lock is a non-sleepable rwlock.=C2=A0 But on RT, where m= mu_lock > becomes sleepable, preemption is left enabled for rmap writers: >=20 > =C2=A0 WARNING: arch/x86/kvm/mmu/mmu.c:920 at __kvm_rmap_lock+0x1a7/0x1e0= [kvm], CPU#16: vmx_apic_update/3708 > =C2=A0 CPU: 16 UID: 0 PID: 3708 Comm: vmx_apic_update Not tainted 7.2.0-r= c7 #52 PREEMPT_{RT,LAZY} > =C2=A0 RIP: 0010:__kvm_rmap_lock+0x1a7/0x1e0 [kvm] > =C2=A0 Call Trace: > =C2=A0=C2=A0 pte_list_add+0x67/0x4d0 [kvm] > =C2=A0=C2=A0 __link_shadow_page+0x249/0x480 [kvm] > =C2=A0=C2=A0 ept_fetch+0x4d5/0x1220 [kvm] > =C2=A0=C2=A0 ept_page_fault+0x60b/0x850 [kvm] > =C2=A0=C2=A0 kvm_mmu_do_page_fault+0x252/0x690 [kvm] >=20 > Alternatively, KVM could manually disable preemption when grabbing an rma= p > lock, but as above, that isn't what RT kernels generally want, and it's > actually more complex to implement (cleanly). >=20 > To not completely lose the scaling advantage of per-rmap locks, take > mmu_lock for read in the aging path, i.e. allow multiple concurrent aging > tasks, as the aging code needs to use atomic SPTE accesses no matter what= , > i.e. no extra code/work is required to guard against concurrent aging of > SPTEs. >=20 > Reported-by: David Woodhouse > Closes: https://lore.kernel.org/all/8d47b43e1829ac92703723e6a1a4afc7a2eaa= cb5.camel@infradead.org > Fixes: 4834eaded91e ("KVM: x86/mmu: Add infrastructure to allow walking r= maps outside of mmu_lock") > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse Tested-by: David Woodhouse --=-XiVkt5Jod9QdoQAa54/h Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCE8Ew ggWvMIIEl6ADAgECAhANkOKMSmGXhF5eMl0rsRhvMA0GCSqGSIb3DQEBDAUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi 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