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Fri, 2 Oct 2020 17:06:18 +0000 From: Tom Lendacky To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org Cc: Paolo Bonzini , Jim Mattson , Joerg Roedel , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Borislav Petkov , Ingo Molnar , Thomas Gleixner , Brijesh Singh Subject: [RFC PATCH v2 22/33] KVM: SVM: Add support for CR8 write traps for an SEV-ES guest Date: Fri, 2 Oct 2020 12:02:46 -0500 Message-Id: <804d4b6fbd859089ba5bd1299755ebd37fb9300a.1601658176.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: References: Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SN6PR01CA0022.prod.exchangelabs.com (2603:10b6:805:b6::35) To DM5PR12MB1355.namprd12.prod.outlook.com (2603:10b6:3:6e::7) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SN6PR01CA0022.prod.exchangelabs.com (2603:10b6:805:b6::35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3433.37 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: iqYfsWk4KeqrFtssQy7CkeodEUEIJErNz/4+aKLzgBBmE5i5N9mtI5eqOStJG+aJS2MwTX95BL+bYJ1Q81yxkvrS8ED+zgJ9aFP6vSbYJuT6GvoQ9QPdYycN6eJAu7iM30uqwCotGx71V2BZFhxWCLTPuFcDcGTH4ja1vRHgNqt5d8eDnu1KZ/Pln18IfnVglATINJbm2M98X3itPIBhdu7UKjmXIj2PV+IuWviF5Wy4vKQAwWjr7WG7iXZW13y9agEiYSkPq+eX8Z8+4zV2mvyG0ZYTXVUSftOhN+tk/SC8OHP5ZBkWSaLi1S0ZFYKgTsC0FYj1EjZFJ8zqd7p5D5l55guaXJfbsVy8zs6NGShPNbeQ+Sja77yUFZs5/1I13600qEbdbMsZbZzfRXLglCJlb6kqu1RkeMNXEAJmSTXw8UK4tnkXug/uwmBaXVKpKjwE8ReUT1PfarLyiqdzhtTnM0ftx6RQ0XROUzNhQAepuek4tkZIimrrGZhAoagvDjaO2co7qvvuyjgQ4YS6VueDVvOhlt0Q06PE1ciqhhpTy9ae215zcYsR0tWy1HTVs8i2q2L7oyBH25gJbI6Uo5R7wL4ae3O3xniRX644t0NeH4RDaVyTHzAtmvIkgtZZ06kfWCHswfvolnBTP9zh1w== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: cf7778c8-f188-42e3-0274-08d866f57a74 X-MS-Exchange-CrossTenant-AuthSource: DM5PR12MB1355.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Oct 2020 17:06:18.1868 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ab1kePHb8CEOoqV/RyXysZXIvo/BdBYb+rARDNVoOrpNqQcAqemFG0ok2WxlEa+AmjZcNtW8LpJNdH88l4cS3Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4218 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tom Lendacky For SEV-ES guests, the interception of control register write access is not recommended. Control register interception occurs prior to the control register being modified and the hypervisor is unable to modify the control register itself because the register is located in the encrypted register state. SEV-ES guests introduce new control register write traps. These traps provide intercept support of a control register write after the control register has been modified. The new control register value is provided in the VMCB EXITINFO1 field, allowing the hypervisor to track the setting of the guest control registers. Add support to track the value of the guest CR8 register using the control register write trap so that the hypervisor understands the guest operating mode. Signed-off-by: Tom Lendacky --- arch/x86/include/uapi/asm/svm.h | 1 + arch/x86/kvm/svm/svm.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/arch/x86/include/uapi/asm/svm.h b/arch/x86/include/uapi/asm/svm.h index 423f242a7a8d..b486c02935ef 100644 --- a/arch/x86/include/uapi/asm/svm.h +++ b/arch/x86/include/uapi/asm/svm.h @@ -204,6 +204,7 @@ { SVM_EXIT_EFER_WRITE_TRAP, "write_efer_trap" }, \ { SVM_EXIT_CR0_WRITE_TRAP, "write_cr0_trap" }, \ { SVM_EXIT_CR4_WRITE_TRAP, "write_cr4_trap" }, \ + { SVM_EXIT_CR8_WRITE_TRAP, "write_cr8_trap" }, \ { SVM_EXIT_INVPCID, "invpcid" }, \ { SVM_EXIT_NPF, "npf" }, \ { SVM_EXIT_AVIC_INCOMPLETE_IPI, "avic_incomplete_ipi" }, \ diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 6b6cf071e656..7082432db161 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -2498,6 +2498,9 @@ static int cr_trap(struct vcpu_svm *svm) ret = __kvm_set_cr4(&svm->vcpu, old_value, new_value); break; + case 8: + ret = kvm_set_cr8(&svm->vcpu, new_value); + break; default: WARN(1, "unhandled CR%d write trap", cr); ret = 1; @@ -3089,6 +3092,7 @@ static int (*const svm_exit_handlers[])(struct vcpu_svm *svm) = { [SVM_EXIT_EFER_WRITE_TRAP] = efer_trap, [SVM_EXIT_CR0_WRITE_TRAP] = cr_trap, [SVM_EXIT_CR4_WRITE_TRAP] = cr_trap, + [SVM_EXIT_CR8_WRITE_TRAP] = cr_trap, [SVM_EXIT_INVPCID] = invpcid_interception, [SVM_EXIT_NPF] = npf_interception, [SVM_EXIT_RSM] = rsm_interception, -- 2.28.0