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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-661a3c66e0dsm3162371a12.7.2026.03.09.04.47.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Mar 2026 04:47:36 -0700 (PDT) Message-ID: <805525cb-ef53-4bdd-a73b-6fe7513228ce@oss.qualcomm.com> Date: Mon, 9 Mar 2026 12:47:33 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V3 2/5] platform: arm64: Add driver for EC found on Qualcomm reference devices To: Sibi Sankar , Stephan Gerhold Cc: robh@kernel.org, krzk+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org, bryan.odonoghue@linaro.org, ilpo.jarvinen@linux.intel.com, hansg@kernel.org, conor+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, Maya Matuszczyk References: <20260308233646.2318676-1-sibi.sankar@oss.qualcomm.com> <20260308233646.2318676-3-sibi.sankar@oss.qualcomm.com> <96f8738f-9baa-4528-8bc6-6ce20030e391@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <96f8738f-9baa-4528-8bc6-6ce20030e391@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: wmw_Uvko_4nzQEdxIXVq4bwIF50QvD0x X-Authority-Analysis: v=2.4 cv=I+Vohdgg c=1 sm=1 tr=0 ts=69aeb35a cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=uGzmvu1gi_0XBBI2Y4EA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA5MDEwNyBTYWx0ZWRfX/hfN9W0l1ecP BINY4zcOqbGqQB7brjyT1FfMLNr+UZLA3hIO+7OfHWCXzfxslTIR6cpiiuOflRQKL0HyT60gcRq qr7MBbER0bOmeg5y0vwImCC3uEAUd4XjJbdqwYEhh3MVx8EFk9PYgK3qkuMGIu/wI//NiigXNL1 Z3l2YbNRnsQih82FUjbmzRGgc+5AgqmcRXqX/jHwx+Uj5RjfnIwmWNSSUS1YACF40q+ed48qnzf zQQy5Jxysav9JzvaHn4A185YhzZn6/nh2lzAFSXC/UstmEoE3gIAKXQtzr2zpZruQaS7gEJD33h 7CVFL1ZWsbUtBUyU/ydQlunRpUADNP0UjTX9U/EIHcNAMmPKJZCGLxOaQUF7VieKJ2XVOl7Je39 BniIsId+5Mh6Dj42CAEHo/mmhRd3ig7sMkK0ZsIMXXiFAQbCcJrJ1nqMC2d0aag0OroQCclw0y1 9DRaXu4Kc/LWynOuJ2g== X-Proofpoint-ORIG-GUID: wmw_Uvko_4nzQEdxIXVq4bwIF50QvD0x X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-09_03,2026-03-06_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 spamscore=0 malwarescore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603090107 On 3/9/26 11:04 AM, Sibi Sankar wrote: > > On 3/9/2026 2:33 PM, Stephan Gerhold wrote: >> On Mon, Mar 09, 2026 at 05:06:43AM +0530, Sibi Sankar wrote: >>> Add Embedded controller driver support for Hamoa/Purwa/Glymur qualcomm >>> reference boards. It handles fan control, temperature sensors, access >>> to EC state changes and supports reporting suspend entry/exit to the >>> EC. >>> >>> Co-developed-by: Maya Matuszczyk >>> Signed-off-by: Maya Matuszczyk >>> Signed-off-by: Sibi Sankar >>> --- >>>   MAINTAINERS                            |   7 + >>>   drivers/platform/arm64/Kconfig         |  12 + >>>   drivers/platform/arm64/Makefile        |   1 + >>>   drivers/platform/arm64/qcom-hamoa-ec.c | 462 +++++++++++++++++++++++++ >>>   4 files changed, 482 insertions(+) >>>   create mode 100644 drivers/platform/arm64/qcom-hamoa-ec.c >>> >>> [...] >>> diff --git a/drivers/platform/arm64/qcom-hamoa-ec.c b/drivers/platform/arm64/qcom-hamoa-ec.c >>> new file mode 100644 >>> index 000000000000..83aa869fad8f >>> --- /dev/null >>> +++ b/drivers/platform/arm64/qcom-hamoa-ec.c >>> @@ -0,0 +1,462 @@ >>> [...] >>> +static int qcom_ec_read(struct qcom_ec *ec, u8 cmd, u8 resp_len, u8 *resp) >>> +{ >>> +    int ret; >>> + >>> +    mutex_lock(&ec->lock); >>> +    ret = i2c_smbus_read_i2c_block_data(ec->client, cmd, resp_len, resp); >>> +    mutex_unlock(&ec->lock); >> This mutex looks redundant to me for the current implementation. You >> don't have any read-modify-write sequences and I think the I2C core >> already has internal locking for the bus itself. > > Hey Stephan, > Thanks for taking time to review the series :) > > Will remove this in the next re-spin. > >> >>> [...] >>> +/* >>> + * Fan Debug control command: >>> + * >>> + * Command Payload: >>> + * ------------------------------------------------------------------------------ >>> + * | Offset    | Name        | Description                    | >>> + * ------------------------------------------------------------------------------ >>> + * | 0x00    | Command    | Fan control command                | >>> + * ------------------------------------------------------------------------------ >>> + * | 0x01    | Fan ID    | 0x1 : Fan 1                    | >>> + * |        |        | 0x2 : Fan 2                    | >>> + * ------------------------------------------------------------------------------ >>> + * | 0x02    | Byte count = 4| Size of data to set fan speed            | >>> + * ------------------------------------------------------------------------------ >>> + * | 0x03    | Mode        | Bit 0: Debug Mode On/Off (0 - OFF, 1 - ON )    | >>> + * |        |        | Bit 1: Fan On/Off (0 - Off, 1 - ON)        | >>> + * |        |        | Bit 2: Debug Type (0 - RPM, 1 - PWM)        | >>> + * ------------------------------------------------------------------------------ >>> + * | 0x04 (LSB)    | Speed in RPM    | RPM value, if mode selected is RPM        | >>> + * | 0x05    |        |                        | >>> + * ------------------------------------------------------------------------------ >>> + * | 0x06    | Speed in PWM    | PWM value, if mode selected is PWM (0 - 255)    | >>> + * ______________________________________________________________________________ >>> + * >>> + */ >>> +static int qcom_ec_fan_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state) >>> +{ >>> +    struct qcom_ec_cooling_dev *ec_cdev = cdev->devdata; >>> +    struct device *dev = ec_cdev->parent_dev; >>> +    struct i2c_client *client = to_i2c_client(dev); >>> + >>> +    u8 request[6] = { ec_cdev->fan_id, EC_FAN_SPEED_DATA_SIZE, >>> +              EC_FAN_DEBUG_MODE_ON | EC_FAN_ON | EC_FAN_DEBUG_TYPE_PWM, >>> +              0, 0, state }; >>> +    int ret; >>> + >>> +    ret = i2c_smbus_write_i2c_block_data(client, EC_FAN_DBG_CONTROL_CMD, >>> +                         sizeof(request), request); >> I think it's nice to provide users a way to override the fan speed, but >> is this really the main interface of the EC that we want to use for >> influencing the fan speed? >> >> As the name of the command suggests, this is a debug command that >> essentially overrides the internal fan control algorithm of the EC. If >> you use this to turn the fan off and then Linux hangs, I would expect >> that the fan stays off until the device will eventually overheat. >> >> I think it would be more reliable if: >> >>   (1) The default mode of operation does not make use of the "debug mode" >>       command and instead sends the internal SoC temperatures to the EC >>       to help optimize the fan control. (This is what Windows does on >>       Hamoa, not sure if this is still needed on Glymur?) > > That's true, Glymur already has a way to access average SoC > temperature and even on Hamoa it can still be functional without > SoC temperature i.e. with thermistors it has access to. > > The aim of the series is to expose fans as a cooling device so > that linux has a way of fan control independent to the algorithm > running on the EC. I suppose the main question here is "what happens if i set the fan to zero and put the laptop in my backpack" The driver for M-series Macs for example, 785205fd8139 ("hwmon: Add Apple Silicon SMC hwmon driver") hides that behind a cmdline param, since they have no certainty. I would *assume* that if the CPU hits thermal junction temperatures, our boards will reset, but we should be able to get a definitive answer here. Konrad