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[68.4.215.93]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-200bbb63778sm16913035ad.302.2024.08.10.19.42.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 10 Aug 2024 19:43:00 -0700 (PDT) Message-ID: <80a257e8-65fb-4545-a00d-9cb793d1b120@broadcom.com> Date: Sat, 10 Aug 2024 19:42:59 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] firmware: arm_scmi: Support 'reg-io-width' property for shared memory To: linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sudeep Holla , Cristian Marussi , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list , arm-scmi@vger.kernel.org, james.quinlan@broadcom.com, justin.chen@broadcom.com, kapil.hali@broadcom.com, bcm-kernel-feedback-list@broadcom.com References: <20240810214621.14417-1-florian.fainelli@broadcom.com> <20240810214621.14417-3-florian.fainelli@broadcom.com> Content-Language: en-US From: Florian Fainelli Autocrypt: addr=florian.fainelli@broadcom.com; keydata= xsBNBFPAG8ABCAC3EO02urEwipgbUNJ1r6oI2Vr/+uE389lSEShN2PmL3MVnzhViSAtrYxeT M0Txqn1tOWoIc4QUl6Ggqf5KP6FoRkCrgMMTnUAINsINYXK+3OLe7HjP10h2jDRX4Ajs4Ghs JrZOBru6rH0YrgAhr6O5gG7NE1jhly+EsOa2MpwOiXO4DE/YKZGuVe6Bh87WqmILs9KvnNrQ PcycQnYKTVpqE95d4M824M5cuRB6D1GrYovCsjA9uxo22kPdOoQRAu5gBBn3AdtALFyQj9DQ KQuc39/i/Kt6XLZ/RsBc6qLs+p+JnEuPJngTSfWvzGjpx0nkwCMi4yBb+xk7Hki4kEslABEB AAHNMEZsb3JpYW4gRmFpbmVsbGkgPGZsb3JpYW4uZmFpbmVsbGlAYnJvYWRjb20uY29tPsLB IQQQAQgAywUCZWl41AUJI+Jo+hcKAAG/SMv+fS3xUQWa0NryPuoRGjsA3SAUAAAAAAAWAAFr ZXktdXNhZ2UtbWFza0BwZ3AuY29tjDAUgAAAAAAgAAdwcmVmZXJyZWQtZW1haWwtZW5jb2Rp bmdAcGdwLmNvbXBncG1pbWUICwkIBwMCAQoFF4AAAAAZGGxkYXA6Ly9rZXlzLmJyb2FkY29t Lm5ldAUbAwAAAAMWAgEFHgEAAAAEFQgJChYhBNXZKpfnkVze1+R8aIExtcQpvGagAAoJEIEx tcQpvGagWPEH/2l0DNr9QkTwJUxOoP9wgHfmVhqc0ZlDsBFv91I3BbhGKI5UATbipKNqG13Z TsBrJHcrnCqnTRS+8n9/myOF0ng2A4YT0EJnayzHugXm+hrkO5O9UEPJ8a+0553VqyoFhHqA zjxj8fUu1px5cbb4R9G4UAySqyeLLeqnYLCKb4+GklGSBGsLMYvLmIDNYlkhMdnnzsSUAS61 WJYW6jjnzMwuKJ0ZHv7xZvSHyhIsFRiYiEs44kiYjbUUMcXor/uLEuTIazGrE3MahuGdjpT2 IOjoMiTsbMc0yfhHp6G/2E769oDXMVxCCbMVpA+LUtVIQEA+8Zr6mX0Yk4nDS7OiBlvOwE0E U8AbwQEIAKxr71oqe+0+MYCc7WafWEcpQHFUwvYLcdBoOnmJPxDwDRpvU5LhqSPvk/yJdh9k 4xUDQu3rm1qIW2I9Puk5n/Jz/lZsqGw8T13DKyu8eMcvaA/irm9lX9El27DPHy/0qsxmxVmU pu9y9S+BmaMb2CM9IuyxMWEl9ruWFS2jAWh/R8CrdnL6+zLk60R7XGzmSJqF09vYNlJ6Bdbs MWDXkYWWP5Ub1ZJGNJQ4qT7g8IN0qXxzLQsmz6tbgLMEHYBGx80bBF8AkdThd6SLhreCN7Uh IR/5NXGqotAZao2xlDpJLuOMQtoH9WVNuuxQQZHVd8if+yp6yRJ5DAmIUt5CCPcAEQEAAcLB gQQYAQIBKwUCU8AbwgUbDAAAAMBdIAQZAQgABgUCU8AbwQAKCRCTYAaomC8PVQ0VCACWk3n+ obFABEp5Rg6Qvspi9kWXcwCcfZV41OIYWhXMoc57ssjCand5noZi8bKg0bxw4qsg+9cNgZ3P N/DFWcNKcAT3Z2/4fTnJqdJS//YcEhlr8uGs+ZWFcqAPbteFCM4dGDRruo69IrHfyyQGx16s CcFlrN8vD066RKevFepb/ml7eYEdN5SRALyEdQMKeCSf3mectdoECEqdF/MWpfWIYQ1hEfdm C2Kztm+h3Nkt9ZQLqc3wsPJZmbD9T0c9Rphfypgw/SfTf2/CHoYVkKqwUIzI59itl5Lze+R5 wDByhWHx2Ud2R7SudmT9XK1e0x7W7a5z11Q6vrzuED5nQvkhAAoJEIExtcQpvGagugcIAJd5 EYe6KM6Y6RvI6TvHp+QgbU5dxvjqSiSvam0Ms3QrLidCtantcGT2Wz/2PlbZqkoJxMQc40rb fXa4xQSvJYj0GWpadrDJUvUu3LEsunDCxdWrmbmwGRKqZraV2oG7YEddmDqOe0Xm/NxeSobc MIlnaE6V0U8f5zNHB7Y46yJjjYT/Ds1TJo3pvwevDWPvv6rdBeV07D9s43frUS6xYd1uFxHC 7dZYWJjZmyUf5evr1W1gCgwLXG0PEi9n3qmz1lelQ8lSocmvxBKtMbX/OKhAfuP/iIwnTsww 95A2SaPiQZA51NywV8OFgsN0ITl2PlZ4Tp9hHERDe6nQCsNI/Us= In-Reply-To: <20240810214621.14417-3-florian.fainelli@broadcom.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 8/10/2024 2:46 PM, Florian Fainelli wrote: > Some shared memory areas might only support a certain access width, > (e.g.: 32 bits accesses only). Update the shmem layer to support > reading from and writing to such shared memory area using the specified > I/O width in the Device Tree. The various transport layers making use of > the shmem.c code are updated accordingly to pass the I/O width to the > routines that need it. > > Signed-off-by: Florian Fainelli Doing a self review, though I will only resend after collecting additional feedback. > --- > drivers/firmware/arm_scmi/common.h | 14 +++- > .../arm_scmi/scmi_transport_mailbox.c | 12 ++- > .../firmware/arm_scmi/scmi_transport_optee.c | 7 +- > .../firmware/arm_scmi/scmi_transport_smc.c | 10 ++- > drivers/firmware/arm_scmi/shmem.c | 77 ++++++++++++++++--- > 5 files changed, 96 insertions(+), 24 deletions(-) > > diff --git a/drivers/firmware/arm_scmi/common.h b/drivers/firmware/arm_scmi/common.h > index 69928bbd01c2..97dae844a190 100644 > --- a/drivers/firmware/arm_scmi/common.h > +++ b/drivers/firmware/arm_scmi/common.h > @@ -170,6 +170,7 @@ void scmi_protocol_release(const struct scmi_handle *handle, u8 protocol_id); > * This can be dynamically set by transports at run-time > * inside their provided .chan_setup(). > * @transport_info: Transport layer related information > + * @shmem_io_width: I/O width in bytes of the shared memory area > */ > struct scmi_chan_info { > int id; > @@ -178,6 +179,7 @@ struct scmi_chan_info { > struct scmi_handle *handle; > bool no_completion_irq; > void *transport_info; > + u32 shmem_io_width; This is not used because the individual transports store the shmem_io_width in their own transport_info structure. [snip] > > +#define __shmem_copy_toio_tpl(s) \ > + for (unsigned int i = 0; i < xfer->tx.len; i += shmem_io_width) \ > + iowrite##s(((u##s *)(xfer->tx.buf))[i / shmem_io_width], \ > + shmem->msg_payload + i); > + > +#define __shmem_copy_fromio_tpl(s) \ > + for (unsigned int i = 0; i < xfer->rx.len; i += shmem_io_width) \ > + ((u##s *)(xfer->rx.buf))[i / shmem_io_width] = \ > + ioread##s(shmem->msg_payload + shmem_io_width + i); This needs to be shmem->msg_payload + 4 + i. This worked in my testing because I was precisely tseting with 'reg-io-width = <4>'. [snip] > > static u32 shmem_read_header(struct scmi_shared_mem __iomem *shmem) > @@ -81,8 +109,34 @@ static u32 shmem_read_header(struct scmi_shared_mem __iomem *shmem) > return ioread32(&shmem->msg_header); > } > > +static void __shmem_fetch_resp_notif_data(struct scmi_xfer *xfer, > + struct scmi_shared_mem __iomem *shmem, > + u32 shmem_io_width) > +{ > + /* Take a copy to the rx buffer.. */ > + switch (shmem_io_width) { > + case 1: > + __shmem_copy_fromio_tpl(8); > + break; > + case 2: > + __shmem_copy_fromio_tpl(16); > + break; > + case 4: > + __shmem_copy_fromio_tpl(32); > + break; > + case 8: > + __shmem_copy_fromio_tpl(32); This should be 64 and it looks like ioread64/iowrite64 is not necessarily defined for 32-bit configurations, so this needs to be gated with a CONFIG_64BIT define here since ioread64/iowrite64 in include/asm-generic/io.h is defined that way. -- Florian