From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5DB0C3845AC for ; Fri, 31 Jul 2026 08:01:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785484887; cv=none; b=vGPeflnQjsqDZDX/WpYtXtxNCq4aZloy9EVwk1NJ/fYpDOr1a+yT/VNqX8Zpsy4TIiqt0aX35LFZemB0i0uxy9o0Cir6R2+WfQGxWWkPcpSGgTCHq7WHauXaNWSnoQXw+7Gt69zU51me84p6VU3LGDVMLJCrNiAH4s2udi9hLXM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785484887; c=relaxed/simple; bh=FGxwfJAUBwhCq/7ROi+0BbOdS2wTWRDrlbk9/c+bwXA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=aTNZNp6P+l93GxJn+J4nv/hqF1uT5bm3sUSLFzBzFlnv53Ec9Perz05QDH334Sku+Nvk4LOMFNdwOkdLDDHwH84cYf+XIfou/r38iTfsc+MTa31Zbyi7rlZPjmCN4VO0ZCr2qfM8vA5XFJGi8BX0vKourkdoifzy9eczTLr02J4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=k2cCQb/5; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="k2cCQb/5" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A132620E3; Fri, 31 Jul 2026 01:01:20 -0700 (PDT) Received: from [10.57.87.104] (unknown [10.57.87.104]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3A5903F7B4; Fri, 31 Jul 2026 01:01:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785484884; bh=FGxwfJAUBwhCq/7ROi+0BbOdS2wTWRDrlbk9/c+bwXA=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=k2cCQb/5SSlhgpJ+YCZWOaemONKjq80m/XCHHNPLPg62Xt3Ybro08g4GBjQDLTki6 8mZs1OWFWbmXCq/26RFpwSBHCjySUcI7mkwk/yBiHUOesbQHX3cjzFuFAQ+PggH8Db CWx/FP7qhdpsau0lTMhEtyIgWbTZGg71XQVkDaLA= Message-ID: <80bb0e4c-630b-49d2-af7d-4fbf6927d513@arm.com> Date: Fri, 31 Jul 2026 09:01:15 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/3] drm/panthor: Revisit reqs_lock handling in flush/reset paths To: Nicolas Frattaroli , Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , K Prateek Nayak , Boris Brezillon , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Grant Likely , Heiko Stuebner Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, kernel@collabora.com References: <20260730-panthor-cache-flush-fix-v2-0-28790478bfff@collabora.com> <20260730-panthor-cache-flush-fix-v2-2-28790478bfff@collabora.com> From: Steven Price Content-Language: en-GB In-Reply-To: <20260730-panthor-cache-flush-fix-v2-2-28790478bfff@collabora.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 30/07/2026 12:45, Nicolas Frattaroli wrote: > panthor_gpu_flush_caches() and panthor_gpu_soft_reset() would read (and > even reset) the contents of the pending_reqs register outside of holding > the reqs_lock. Additionally, when it did hold the lock, it did so with > the irqsave/irqrestore variants, even though the spinlock was never > acquired in an atomic context, just the threaded handler. > > Use the new wait_event_lock_timeout() macro to check pending_reqs under > the lock, and only do so without disabling interrupts. > > Fixes: 5cd894e258c4 ("drm/panthor: Add the GPU logical block") > Signed-off-by: Nicolas Frattaroli Reviewed-by: Steven Price > --- > drivers/gpu/drm/panthor/panthor_gpu.c | 25 +++++++++++-------------- > 1 file changed, 11 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c > index c013d6bf9a59..f015bde80abf 100644 > --- a/drivers/gpu/drm/panthor/panthor_gpu.c > +++ b/drivers/gpu/drm/panthor/panthor_gpu.c > @@ -330,35 +330,34 @@ int panthor_gpu_flush_caches(struct panthor_device *ptdev, > u32 l2, u32 lsc, u32 other) > { > struct panthor_gpu *gpu = ptdev->gpu; > - unsigned long flags; > int ret = 0; > > /* Serialize cache flush operations. */ > guard(mutex)(&ptdev->gpu->cache_flush_lock); > > - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); > + spin_lock(&ptdev->gpu->reqs_lock); > if (!(ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED)) { > ptdev->gpu->pending_reqs |= GPU_IRQ_CLEAN_CACHES_COMPLETED; > gpu_write(gpu->iomem, GPU_CMD, GPU_FLUSH_CACHES(l2, lsc, other)); > } else { > ret = -EIO; > } > - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); > > - if (ret) > + if (ret) { > + spin_unlock(&ptdev->gpu->reqs_lock); > return ret; > + } > > - if (!wait_event_timeout(ptdev->gpu->reqs_acked, > + if (!wait_event_lock_timeout(ptdev->gpu->reqs_acked, > !(ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED), > - msecs_to_jiffies(100))) { > - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); > + ptdev->gpu->reqs_lock, msecs_to_jiffies(100))) { > if ((ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED) != 0 && > !(gpu_read(gpu->irq.iomem, INT_RAWSTAT) & GPU_IRQ_CLEAN_CACHES_COMPLETED)) > ret = -ETIMEDOUT; > else > ptdev->gpu->pending_reqs &= ~GPU_IRQ_CLEAN_CACHES_COMPLETED; > - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); > } > + spin_unlock(&ptdev->gpu->reqs_lock); > > if (ret) { > panthor_device_schedule_reset(ptdev); > @@ -378,27 +377,25 @@ int panthor_gpu_soft_reset(struct panthor_device *ptdev) > { > struct panthor_gpu *gpu = ptdev->gpu; > bool timedout = false; > - unsigned long flags; > > - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); > + guard(spinlock)(&ptdev->gpu->reqs_lock); > + > if (!drm_WARN_ON(&ptdev->base, > ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED)) { > ptdev->gpu->pending_reqs |= GPU_IRQ_RESET_COMPLETED; > gpu_write(gpu->irq.iomem, INT_CLEAR, GPU_IRQ_RESET_COMPLETED); > gpu_write(gpu->iomem, GPU_CMD, GPU_SOFT_RESET); > } > - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); > > - if (!wait_event_timeout(ptdev->gpu->reqs_acked, > + if (!wait_event_lock_timeout(ptdev->gpu->reqs_acked, > !(ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED), > + ptdev->gpu->reqs_lock, > msecs_to_jiffies(100))) { > - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); > if ((ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED) != 0 && > !(gpu_read(gpu->irq.iomem, INT_RAWSTAT) & GPU_IRQ_RESET_COMPLETED)) > timedout = true; > else > ptdev->gpu->pending_reqs &= ~GPU_IRQ_RESET_COMPLETED; > - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); > } > > if (timedout) { >