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Wysocki (Intel)" Cc: Keng-Yu Lin , Bjorn Helgaas , Matthew Ruffell , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, andy.liang@hpe.com, david.chang@hpe.com, s.collins@hpe.com, jenifer.golmitz@hpe.com, pravallika.kamma@hpe.com, zhen-dong.lai@hpe.com, zachary.pabor-ext@hpe.com References: <20261012104645.975190-1-keng-yu.lin@hpe.com> <642c49e1-7d47-44fd-b597-e5ff0877bb56@amd.com> <20261013060957.1023448-1-keng-yu.lin@hpe.com> From: Mario Limonciello In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: BN0PR04CA0090.namprd04.prod.outlook.com (2603:10b6:408:ea::35) To PH8PR12MB6914.namprd12.prod.outlook.com (2603:10b6:510:1cb::21) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH8PR12MB6914:EE_|CY5PR12MB6107:EE_ X-MS-Office365-Filtering-Correlation-Id: 109fb17f-fb75-4ee3-2b6d-08df2973adcc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|7416014|366016|23010399003|261009221727099003|56012099006|261009223027099003|261009220027099003|4143699003|11063799006|261009221227099003|261009223327099003|10067099003|22082099003|18002099003; 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Wysocki (Intel) wrote: > On Tue, Oct 13, 2026 at 5:52 PM Rafael J. Wysocki (Intel) > wrote: >> >> On Tue, Oct 13, 2026 at 5:41 PM Mario Limonciello >> wrote: >>> >>> >>> >>> On 10/13/26 10:23, Rafael J. Wysocki (Intel) wrote: >>>> On Tue, Oct 13, 2026 at 8:10 AM Keng-Yu Lin wrote: >>>>> >>>>> Hi Rafael, Mario, >>>>> >>>>> The initial read is not needed to fix the reported D3hot-to-D0 >>>>> failure. I added it to avoid extra BAR writes on devices already >>>>> in D0. >>>>> >>>>> pci_power_up() does update current_state, but need_restore is >>>>> calculated before that update. The check includes: >>>>> >>>>> dev->current_state >= PCI_D3hot >>>>> >>>>> For an initially unknown device with PMCSR reporting D0 and >>>>> No_Soft_Reset clear, this still requests a BAR restore. Reading >>>>> the state first avoids that request, although the final >>>>> current_state is D0 either way. >>>> >>>> Fair enough, but if the device is in D0 already, it need not be >>>> powered up, so if you make a point to update the power state upfront, >>>> you may as well skip the power up if the outcome is D0. >>> >>> It actually does need to have all the ACPI calls that happen as part of >>> the D0 transition though like _REG. >> >> Good point. >> >> This basically means that the upfront power state check belongs to the >> logic to determine whether or not to restore the BARs which should be >> part of pci_power_up(). >> >> So now the question is, if this upfront power state check is done, is >> it still useful to read PMCSR after calling >> platform_pci_set_power_state() in pci_power_up()? > > Or what about using the following sequence: > > pci_update_current_state(dev, PCI_UNKNOWN); > if (dev->current_state == PCI_D0) { > /* No need to do a full power-up, just sync-up the platform state. */ > platform_pci_set_power_state(dev, PCI_D0); > } else { > /* Power up the device and restore BARs if necessary. */ > pci_set_full_power_state(dev, false); > } > pci_update_current_state(dev, PCI_D0); That looks great to me.