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[75.72.117.212]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-88d997aef2esm238379696d6.32.2025.12.29.19.14.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Dec 2025 19:14:42 -0800 (PST) Message-ID: <80e18a32-543a-48f5-81f2-4fa64cb8bf8c@riscstar.com> Date: Mon, 29 Dec 2025 21:14:39 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 11/13] dt-bindings: riscv: Add Supm extension description To: Rob Herring Cc: Guodong Xu , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Yixun Lan , Daniel Lezcano , Thomas Gleixner , Samuel Holland , Anup Patel , Greg Kroah-Hartman , Jiri Slaby , Lubomir Rintel , Yangyu Chen , Paul Walmsley , Conor Dooley , Heinrich Schuchardt , Kevin Meng Zhang , Andrew Jones , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, spacemit@lists.linux.dev, linux-serial@vger.kernel.org References: <20251222-k3-basic-dt-v2-0-3af3f3cd0f8a@riscstar.com> <20251222-k3-basic-dt-v2-11-3af3f3cd0f8a@riscstar.com> <20251230021306.GA3094273-robh@kernel.org> Content-Language: en-US From: Alex Elder In-Reply-To: <20251230021306.GA3094273-robh@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 12/29/25 8:13 PM, Rob Herring wrote: > On Fri, Dec 26, 2025 at 03:28:47PM -0600, Alex Elder wrote: >> On 12/22/25 7:04 AM, Guodong Xu wrote: >>> Add description for the Supm extension. Supm indicates support for pointer >>> masking in user mode. Supm is mandatory for RVA23S64. >>> >>> The Supm extension is ratified in commit d70011dde6c2 ("Update to ratified >>> state") of riscv-j-extension. >>> >>> Supm depends on either Smnpm or Ssnpm, so add a schema check to enforce >>> this dependency. >> >> I have the same general question on this, about whether it's really >> necessary for the DT binding to enforce these requirements. The >> RISC-V specifications are what truly defines their meaning, so I >> don't really see why the DT framework should need to enforce them. >> (That said, I'm sure there are other cases where DT enforces things >> it shouldn't have to.) > > Does the specification have some way to check it? What happens if a DT > is wrong? Are you going to require a DT update to make things right? Or > the kernel has to work-around the error? Neither is great. So having > this as a schema makes sense to prevent either scenario. I'm really glad you weighed in. I actually have several questions related to RISC-V extensions and DT. But for now I'll focus on just this... To answer your first question, I'm not sure how the specification is "checked", or what "it" is that you're asking about for that matter. Also I think we have to be clear about what "wrong" means. RISC-V is defined by a (large and growing) set of specifications that are developed through a well-defined process. When a spec is *ratified* it is committed, and it won't be changed. These specifications are ultimately *the* definition of RISC-V compliance. I assumed the "wrong" you're talking about is a DTS/DTB that has been committed but somehow does not match what a RISC-V spec says, but I might be mistaken. Anyway, we can flip that around and have a similar problem: What if we define the DT binding in such a way that it doesn't match the RISC-V spec? The (ratified) RISC-V spec is right. My thought was that we should have software do the verification, and recommend the software (e.g. arch/riscv/kernel/cpufeature.c in Linux) be updated to verify things before committing to a DT binding. To me, C code is more general and more universally understandable than YAML rules, but I'm biased by how well I work with C versus YAML schemas. In any case, a "wrong" binding is a problem no matter what the reason. One way or another there are things expressed via DT that must match the RISC-V specifications. And yes, we do have tools and bindings that can verify things related to DT. >> And now, having looked at these added binding definitions (in patches >> 07 through 11 in this series), I wonder what exactly is required for >> them to be accepted. For the most part these seem to just be defining >> how the extensions specified for RISC-V are to be expressed in >> DT files. It seems to be a fairly straightforward copy from the >> ratified specification(s) to the YAML format. >> >> Who need to sign off on it? Conor? Paul? DT maintainers? > > I generally leave this extension mess to Conor. Sounds wise. Should I address my other few questions on this topic to Conor? I don't want this particular series to get held up on unrelated discussions. -Alex > Rob