Re: [PATCH] soc/tegra: pmc: Add PMC support for Tegra410

[Jon Hunter <jonathanh@nvidia.com>]

On 22/01/2026 11:08, Kartik Rajput wrote:
> Tegra410 uses PMC driver only to retrieve system reset reason using PMC
> sysfs. Tegra410 uses ACPI to probe PMC, unlike device-tree boot it does
> not use the early initialisation sequence.
> 
> Add PMC support for Tegra410.

Maybe ...

"Add PMC support for Tegra410 which uses the PMC driver ..."


> 
> Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
> ---
>   drivers/soc/tegra/pmc.c | 128 ++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 128 insertions(+)
> 
> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
> index 9cdbd8ba94be..2bdcd6d30261 100644
> --- a/drivers/soc/tegra/pmc.c
> +++ b/drivers/soc/tegra/pmc.c
> @@ -11,6 +11,7 @@
>   
>   #define pr_fmt(fmt) "tegra-pmc: " fmt
>   
> +#include <linux/acpi.h>
>   #include <linux/arm-smccc.h>
>   #include <linux/clk.h>
>   #include <linux/clk-provider.h>
> @@ -3095,12 +3096,30 @@ static void tegra_pmc_reset_suspend_mode(void *data)
>   	pmc->suspend_mode = TEGRA_SUSPEND_NOT_READY;
>   }
>   
> +static int tegra_pmc_acpi_probe(struct platform_device *pdev)
> +{
> +	pmc->soc = device_get_match_data(&pdev->dev);
> +	pmc->dev = &pdev->dev;
> +
> +	pmc->base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(pmc->base))
> +		return PTR_ERR(pmc->base);
> +
> +	tegra_pmc_reset_sysfs_init(pmc);
> +	platform_set_drvdata(pdev, pmc);
> +
> +	return 0;
> +}

Should we just define a tegra_pmc_probe_common() that is used for both 
DT and ACPI? The above is not specific to ACPI.

> +
>   static int tegra_pmc_probe(struct platform_device *pdev)
>   {
>   	void __iomem *base;
>   	struct resource *res;
>   	int err;
>   
> +	if (is_acpi_node(dev_fwnode(&pdev->dev)))
> +		return tegra_pmc_acpi_probe(pdev);
> +
>   	/*
>   	 * Early initialisation should have configured an initial
>   	 * register mapping and setup the soc data pointer. If these
> @@ -4615,6 +4634,108 @@ static const struct tegra_pmc_soc tegra264_pmc_soc = {
>   	.max_wake_vectors = 4,
>   };
>   
> +static const char * const tegra410_reset_sources[] = {
> +	"SYS_RESET_N",		/* 0x0 */
> +	"CSDC_RTC_XTAL",
> +	"VREFRO_POWER_BAD",
> +	"FMON_32K",
> +	"FMON_OSC",
> +	"POD_RTC",
> +	"POD_IO",
> +	"POD_PLUS_IO_SPLL",
> +	"POD_PLUS_IO_VMON",	/* 0x8 */
> +	"POD_PLUS_SOC",
> +	"VMON_PLUS_UV",
> +	"VMON_PLUS_OV",
> +	"FUSECRC_FAULT",
> +	"OSC_FAULT",
> +	"BPMP_BOOT_FAULT",
> +	"SCPM_BPMP_CORE_CLK",
> +	"SCPM_PSC_SE_CLK",	/* 0x10 */
> +	"VMON_SOC_MIN",
> +	"VMON_SOC_MAX",
> +	"NVJTAG_SEL_MONITOR",
> +	"L0_RST_REQ_N",
> +	"NV_THERM_FAULT",
> +	"PSC_SW",
> +	"POD_C2C_LPI_0",
> +	"POD_C2C_LPI_1",	/* 0x18 */
> +	"BPMP_FMON",
> +	"FMON_SPLL_OUT",
> +	"L1_RST_REQ_N",
> +	"OCP_RECOVERY",
> +	"AO_WDT_POR",
> +	"BPMP_WDT_POR",
> +	"RAS_WDT_POR",
> +	"TOP_0_WDT_POR",	/* 0x20 */
> +	"TOP_1_WDT_POR",
> +	"TOP_2_WDT_POR",
> +	"PSC_WDT_POR",
> +	"OOBHUB_WDT_POR",
> +	"MSS_SEQ_WDT_POR",
> +	"SW_MAIN",
> +	"L0L1_RST_OUT_N",
> +	"HSM",			/* 0x28 */
> +	"CSITE_SW",
> +	"AO_WDT_DBG",
> +	"BPMP_WDT_DBG",
> +	"RAS_WDT_DBG",
> +	"TOP_0_WDT_DBG",
> +	"TOP_1_WDT_DBG",
> +	"TOP_2_WDT_DBG",
> +	"PSC_WDT_DBG",		/* 0x30 */
> +	"TSC_0_WDT_DBG",
> +	"TSC_1_WDT_DBG",
> +	"OOBHUB_WDT_DBG",
> +	"MSS_SEQ_WDT_DBG",
> +	"L2_RST_REQ_N",
> +	"L2_RST_OUT_N",
> +	"SC7"
> +};
> +
> +static const struct tegra_pmc_regs tegra410_pmc_regs = {
> +	.rst_status = 0x8,
> +	.rst_source_shift = 0x2,
> +	.rst_source_mask = 0xfc,
> +	.rst_level_shift = 0x0,
> +	.rst_level_mask = 0x3,
> +};
> +
> +static const struct tegra_pmc_soc tegra410_pmc_soc = {
> +	.supports_core_domain = false,
> +	.num_powergates = 0,
> +	.powergates = NULL,
> +	.num_cpu_powergates = 0,
> +	.cpu_powergates = NULL,
> +	.has_tsense_reset = false,
> +	.has_gpu_clamps = false,
> +	.needs_mbist_war = false,
> +	.has_impl_33v_pwr = false,
> +	.maybe_tz_only = false,
> +	.num_io_pads = 0,
> +	.io_pads = NULL,
> +	.num_pin_descs = 0,
> +	.pin_descs = NULL,
> +	.regs = &tegra410_pmc_regs,
> +	.init = NULL,
> +	.setup_irq_polarity = NULL,
> +	.set_wake_filters = NULL,
> +	.irq_set_wake = NULL,
> +	.irq_set_type = NULL,
> +	.reset_sources = tegra410_reset_sources,
> +	.num_reset_sources = ARRAY_SIZE(tegra410_reset_sources),
> +	.reset_levels = tegra186_reset_levels,
> +	.num_reset_levels = ARRAY_SIZE(tegra186_reset_levels),
> +	.num_wake_events = 0,
> +	.wake_events = NULL,
> +	.max_wake_events = 0,
> +	.max_wake_vectors = 0,
> +	.pmc_clks_data = NULL,
> +	.num_pmc_clks = 0,
> +	.has_blink_output = false,
> +	.has_single_mmio_aperture = false,
> +};
> +
>   static const struct of_device_id tegra_pmc_match[] = {
>   	{ .compatible = "nvidia,tegra264-pmc", .data = &tegra264_pmc_soc },
>   	{ .compatible = "nvidia,tegra234-pmc", .data = &tegra234_pmc_soc },
> @@ -4629,6 +4750,12 @@ static const struct of_device_id tegra_pmc_match[] = {
>   	{ }
>   };
>   
> +static const struct acpi_device_id tegra_pmc_acpi_match[] = {
> +	{ .id = "NVDA2016", .driver_data = (kernel_ulong_t)&tegra410_pmc_soc },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(acpi, tegra_pmc_acpi_match);
> +
>   static void tegra_pmc_sync_state(struct device *dev)
>   {
>   	struct device_node *np, *child;
> @@ -4679,6 +4806,7 @@ static struct platform_driver tegra_pmc_driver = {
>   		.name = "tegra-pmc",
>   		.suppress_bind_attrs = true,
>   		.of_match_table = tegra_pmc_match,
> +		.acpi_match_table = tegra_pmc_acpi_match,
>   #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM)
>   		.pm = &tegra_pmc_pm_ops,
>   #endif

-- 
nvpublic