Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

["StDenis, Tom" <Tom.StDenis@amd.com>]

On 2018-11-30 10:07 a.m., Deucher, Alexander wrote:
> Sure, but it might be week or so.  For now can you test against Linus 
> master?  It should be close enough.

I need the bulk move from the our drm-next merge (which isn't yet 
upstream) to trigger the bug though.

I can try to cherry pick it on top of master.

Tom

> 
> 
> Alex
> 
> ------------------------------------------------------------------------
> *From:* StDenis, Tom
> *Sent:* Friday, November 30, 2018 9:52:26 AM
> *To:* Peter Zijlstra; dave.hansen@intel.com; luto@kernel.org
> *Cc:* x86@kernel.org; linux-kernel@vger.kernel.org; Deucher, Alexander
> *Subject:* Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation
> Hi Peter,
> 
> Unfortunately I can't apply this on top of our drm-next the first patch
> fails.
> 
> Alex: could we rebase again at some point?
> 
> Tom
> 
> On 2018-11-30 8:44 a.m., Peter Zijlstra wrote:
>> Hi,
>> 
>> Yesterday Tom reported a CPA bug triggered by the AMDGPU team.
>> 
>> It turns out that with commit:
>> 
>>    a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")
>> 
>> I misread the cpa array code and messed up the TLB invalidations for it. These
>> patches (hopefully) fix the issue while also shrinking the CPA code again.
>> 
>> Tom, would you be so kind as to test again? These patches are significantly
>> different from what I send you yesterday.
>> 
>> ---
>> arch/x86/mm/mm_internal.h |   2 +
>> arch/x86/mm/pageattr.c    | 167 ++++++++++++++++++++--------------------------
>> arch/x86/mm/tlb.c         |   4 +-
>> 3 files changed, 79 insertions(+), 94 deletions(-)
>> 
>