From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030600AbcGKKeV (ORCPT ); Mon, 11 Jul 2016 06:34:21 -0400 Received: from mail-oi0-f65.google.com ([209.85.218.65]:36429 "EHLO mail-oi0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030500AbcGKKd4 (ORCPT ); Mon, 11 Jul 2016 06:33:56 -0400 Subject: Re: [PATCH v2 11/13] KVM: x86: add KVM_CAP_X2APIC_API To: Paolo Bonzini , =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , linux-kernel@vger.kernel.org, kvm@vger.kernel.org References: <20160707171550.14675-1-rkrcmar@redhat.com> <20160707171550.14675-12-rkrcmar@redhat.com> <630f1159-53b4-aeca-ed36-c94e9bf75790@gmail.com> <053e042b-c523-9c10-51e5-59a5ac164bc5@redhat.com> <26250689-9263-58a0-7700-1fa83a1dc96e@gmail.com> Cc: "Lan, Tianyu" , Igor Mammedov , Jan Kiszka , Peter Xu From: Yang Zhang Message-ID: <813844d3-d644-a213-23b1-4d6648e8a8f4@gmail.com> Date: Mon, 11 Jul 2016 18:33:49 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2016/7/11 17:17, Paolo Bonzini wrote: > > > On 11/07/2016 10:56, Yang Zhang wrote: >> On 2016/7/11 15:44, Paolo Bonzini wrote: >>> >>> >>> On 11/07/2016 08:06, Yang Zhang wrote: >>>>> Changes to MSI addresses follow the format used by interrupt remapping >>>>> unit. >>>>> The upper address word, that used to be 0, contains upper 24 bits of >>>>> the LAPIC >>>>> address in its upper 24 bits. Lower 8 bits are reserved as 0. >>>>> Using the upper address word is not backward-compatible either as we >>>>> didn't >>>>> check that userspace zeroed the word. Reserved bits are still not >>>>> explicitly >>>> >>>> Does this means we cannot migrate the VM from KVM_CAP_X2APIC_API enabled >>>> host to the disable host even VM doesn't have more than 255 VCPUs? >>> >>> Yes, but that's why KVM_CAP_X2APIC_API is enabled manually. The idea is >>> that QEMU will not use KVM_CAP_X2APIC_API except on the newest machine >>> type. >> >> Thanks for confirmation. And when the KVM_CAP_X2APIC_API will be enabled >> in Qemu? > > It could be 2.7 or 2.8. > >>> >>> If interrupt remapping is on, KVM_CAP_X2APIC_API is needed even with 8 >>> VCPUs, I think. Otherwise KVM will believe that 0xff is "broadcast" >>> rather than "cluster 0, CPUs 0-7". >> >> If interrupt remapping is using, what 0xff means is relying on which >> mode the destination CPU is in. I think there is no KVM_CAP_X2APIC_API >> needed since interrupt remapping table gives all the information. > > If you have EIM 0xff never means broadcast, but KVM sees a 0xff in the > interrupt route or KVM_SIGNAL_MSI argument and translates it into a > broadcast. I see your point. I thought there would be a new irq router(like KVM_IRQ_ROUTING_IR) to handle all interrupts after turn on IR and KVM_CAP_X2APIC_API would be dropped. So we will continue to use KVM_IRQ_ROUTING_IRQCHIP and KVM_IRQ_ROUTING_MSI for interrupt from IR, right? -- best regards yang