From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752552AbdBINAl (ORCPT ); Thu, 9 Feb 2017 08:00:41 -0500 Received: from mail-wm0-f46.google.com ([74.125.82.46]:38383 "EHLO mail-wm0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752388AbdBINAb (ORCPT ); Thu, 9 Feb 2017 08:00:31 -0500 Subject: Re: [PATCH 2/2] ARM: dts: qcom: Add msm8974 CoreSight components To: Mathieu Poirier References: <20170203183628.28198-1-georgi.djakov@linaro.org> <20170206165238.GA11391@linaro.org> Cc: andy.gross@linaro.org, bjorn.andersson@linaro.org, sboyd@codeaurora.org, devicetree@vger.kernel.org, iivanov.xz@gmail.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org From: Georgi Djakov Message-ID: <814b788c-ce2f-5b44-c49e-e4e211a4f926@linaro.org> Date: Thu, 9 Feb 2017 14:59:51 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <20170206165238.GA11391@linaro.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/06/2017 06:52 PM, Mathieu Poirier wrote: > Hello Georgi, > > Looks good to me, just a cosmetic comment below... > > On Fri, Feb 03, 2017 at 08:36:28PM +0200, Georgi Djakov wrote: >> From: "Ivan T. Ivanov" >> >> Add initial set of CoreSight components found on Qualcomm >> msm8974 and apq8074 based platforms, including the APQ8074 >> Dragonboard board. >> >> Signed-off-by: Ivan T. Ivanov >> Signed-off-by: Georgi Djakov >> --- >> arch/arm/boot/dts/qcom-msm8974.dtsi | 280 +++++++++++++++++++++++++++++++++++- >> 1 file changed, 276 insertions(+), 4 deletions(-) >> >> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi >> index 4b4c61e2ee35..ab766a36a461 100644 >> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi >> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi [..] >> + replicator@fc31c000 { >> + compatible = "qcom,coresight-replicator1x", "arm,primecell"; >> + reg = <0xfc31c000 0x1000>; >> + >> + clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>; >> + clock-names = "apb_pclk", "atclk"; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + replicator_out0: endpoint { >> + remote-endpoint = <&etr_in>; >> + }; >> + }; >> + port@1 { >> + reg = <1>; >> + replicator_out1: endpoint { >> + remote-endpoint = <&tpiu_in>; >> + }; >> + }; >> + port@2 { >> + reg = <0>; >> + replicator_in: endpoint { >> + slave-mode; >> + remote-endpoint = <&etf_out>; >> + }; >> + }; >> + }; >> + }; >> + >> + etf@fc307000 { >> + compatible = "arm,coresight-tmc", "arm,primecell"; >> + reg = <0xfc307000 0x1000>; >> + >> + clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>; >> + clock-names = "apb_pclk", "atclk"; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + etf_out: endpoint { >> + remote-endpoint = <&replicator_in>; >> + }; >> + }; >> + port@1 { >> + reg = <0>; >> + etf_in: endpoint { >> + slave-mode; >> + remote-endpoint = <&merger_out>; >> + }; >> + }; >> + }; >> + }; > > For the replicator and ETF above, output ports are listed before input > ports, while the rest of the components below do the opposite. As such > picturing the topology of the CS components is a little more difficult but has > no ramification on functionality. I would suggest revising that but either way: > > Reviewed-by: Mathieu Poirier Ok, thanks! Will update it. BR, Georgi