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[24.205.208.113]) by smtp.gmail.com with ESMTPSA id bu27-20020a0568300d1b00b0061b8653b0c9sm34031otb.22.2022.07.13.15.07.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 13 Jul 2022 15:07:15 -0700 (PDT) Subject: Re: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation To: matthew.gerlach@linux.intel.com, hao.wu@intel.com, yilun.xu@intel.com, russell.h.weight@intel.com, basheer.ahmed.muddebihal@intel.com, mdf@kernel.org, corbet@lwn.net, linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, tianfei.zhang@intel.com References: <20220707150549.265621-1-matthew.gerlach@linux.intel.com> <20220707150549.265621-2-matthew.gerlach@linux.intel.com> From: Tom Rix Message-ID: <8180679b-1d71-a527-74f2-d77460ea9902@redhat.com> Date: Wed, 13 Jul 2022 15:07:12 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <20220707150549.265621-2-matthew.gerlach@linux.intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/7/22 8:05 AM, matthew.gerlach@linux.intel.com wrote: > From: Matthew Gerlach > > Add documentation on identifying FPGA based PCI cards prompted > by discussion on the linux-fpga@vger.kernel.org mailing list. > > Signed-off-by: Matthew Gerlach > --- > v3: Add url to page tracking PCI ID information for DFL based cards. > > v2: Introduced in v2. > --- > Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst > index 15b670926084..5144775b860a 100644 > --- a/Documentation/fpga/dfl.rst > +++ b/Documentation/fpga/dfl.rst > @@ -507,6 +507,27 @@ ids application. > https://github.com/OPAE/dfl-feature-id > > > +PCI Device Identification > +================================ > +Since FPGA based PCI cards can be reconfigured to a perform a completely > +new function at runtime, properly identifying such cards and binding the > +correct driver can be challenging. In many use cases, deployed FPGA based > +PCI cards are essentially static and the PCI Product ID and Vendor ID pair > +is sufficient to identify the card. The DFL framework helps with the > +dynamic case of deployed FPGA cards changing at run time by providing > +more detailed information about card discoverable at runtime. > + > +At one level, the DFL on a PCI card describes the function of the card. > +However, the same DFL could be instantiated on different physical cards. > +Conversely, different DFLs could be instantiated on the same physical card. > +Practical management of a cloud containing a heterogeneous set of such cards > +requires a PCI level of card identification. While the PCI Product ID and > +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected > +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem > +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking > +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci-ids.rst. This link looks good. It may be good to be explicit and say which device(s) needs to be specified by the quadruple. Reviewed-by: Tom Rix > + > + > Location of DFLs on a PCI Device > ================================ > The original method for finding a DFL on a PCI device assumed the start of the