From: silviazhaooc <silviazhao-oc@zhaoxin.com>
To: Dave Hansen <dave.hansen@intel.com>, <peterz@infradead.org>,
<mingo@redhat.com>, <acme@kernel.org>, <mark.rutland@arm.com>,
<alexander.shishkin@linux.intel.com>, <jolsa@kernel.org>,
<namhyung@kernel.org>, <irogers@google.com>,
<adrian.hunter@intel.com>, <tglx@linutronix.de>, <bp@alien8.de>,
<dave.hansen@linux.intel.com>, <x86@kernel.org>, <hpa@zytor.com>,
<linux-perf-users@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <cobechen@zhaoxin.com>, <louisqi@zhaoxin.com>,
<silviazhao@zhaoxin.com>, <cooperyan@zhaoxin.com>
Subject: Re: [PATCH] perf/x86/zhaoxin: Add Yongfeng support
Date: Mon, 20 Mar 2023 09:35:56 +0800 [thread overview]
Message-ID: <81897a7c-2dab-f854-ff09-e50d8b875f02@zhaoxin.com> (raw)
In-Reply-To: <6f78ecfb-99c8-eee3-cad0-69bbd88a107c@intel.com>
On 2023/3/16 22:59, Dave Hansen wrote:
> On 3/15/23 19:16, silviazhao wrote:
>> + case 0x5b:
>> + zx_pmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =
>> + X86_CONFIG(.event = 0x02, .umask = 0x01, .inv = 0x01,
>> + .cmask = 0x01);
>
> On the Intel side of x86/ land, we used to have these open-coded
> model/family numbers scattered about. But, a few years ago, we started
> populating arch/x86/include/asm/intel-family.h and using those instead.
> I think it's been pretty successful. It's a lot easier to grep for
> INTEL_FAM6_NEHALEM_EX than for 0x2E.
>
> Is there a chance we could start doing the same for other CPU vendors?
> Perhaps start with:
>
> #define ZHAOXIN_FAMILY_YONGFENG 0x5B
Great suggestion. After discussing with my colleagues, we decide to add
these open-coded model/family numbers into a new file like
zhaoxin-family.h, create a new patch set and re-commit.
prev parent reply other threads:[~2023-03-20 1:46 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-16 2:16 silviazhao
2023-03-16 14:59 ` Dave Hansen
2023-03-20 1:35 ` silviazhaooc [this message]
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