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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: hTLthmJNHl2csOXiMre8vwcb2yFZgBCo X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI5MDA4MiBTYWx0ZWRfX868co0bRnHRY bhj1/Nhsu6KzqaLGuYX7tiHGC6kP/cr7paMIoQyA4AdhwtqJsWf+p+FIB1uesQBM5nEUxozxNxz uE3OHocNXw+37DJX7YL/IUT6ziPJOrYzE1g1y7aKiVyxLFQNmme/o+hZJ8NQ47H/5zh7WnP3JLZ Nl9JOY4KqOzsN2W2QPsEPAk4s+U4OQxQZh/TPvebIO8ULmdWhd2ipGFdrI/xDDS0m1+p78SxVmx 0trt9uwnSkOWe3uGBoJLCb7mwaXSbsbaN3yQTHkXol3N46zUGA9F/JyWEM1mdZYSltuyrrwwYaN VQTq5kopNTjtOijhMNngl4qsF8CHp+DyyigOpTkR8udUO2znlJbVxif9H/3Uve1s75pIEeMwBDV 9VeabYIELfVcPA4CObC0OO/Bcf7lhcJr2BX/0cZ6mQoADyDb1+mIwhH5fUfzREGmj88AFBji X-Authority-Analysis: v=2.4 cv=HfYUTjE8 c=1 sm=1 tr=0 ts=6888a4a3 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=a_U1oVfrAAAA:8 a=FtIUmZvm79rvchHu-DsA:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-ORIG-GUID: hTLthmJNHl2csOXiMre8vwcb2yFZgBCo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-29_02,2025-07-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 clxscore=1015 bulkscore=0 suspectscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 mlxlogscore=999 phishscore=0 priorityscore=1501 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507290082 On 7/29/2025 3:19 PM, Richa Bharti wrote: > On QCS615, we see the same issue as reported on SM8250 and SM6350: > "gcc_sdcc2_apps_clk_src: rcg didn't update its configuration" during boot. > This is due to GPLL7 not being enabled by default as a parent clock. > > Setting `.flags = CLK_OPS_PARENT_ENABLE` ensures that the parent (GPLL7) > gets prepared and enabled when switching to it, fixing the warning. > > Fixes: 39d6dcf67fe9 ("clk: qcom: gcc: Add support for QCS615 GCC clocks") > Signed-off-by: Richa Bharti > --- > This change is similar to upstream commits: > - SM8250: 783cb693828c ("clk: qcom: gcc-sm8250: Fix > gcc_sdcc2_apps_clk_src") > - SM6350: df04d166d1f3 ("clk: qcom: gcc-sm6350: Fix > gcc_sdcc2_apps_clk_src") > --- > drivers/clk/qcom/gcc-qcs615.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/qcom/gcc-qcs615.c b/drivers/clk/qcom/gcc-qcs615.c > index 9695446bc2a3..b281f0dfe165 100644 > --- a/drivers/clk/qcom/gcc-qcs615.c > +++ b/drivers/clk/qcom/gcc-qcs615.c > @@ -830,6 +830,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = { > .name = "gcc_sdcc2_apps_clk_src", > .parent_data = gcc_parent_data_8, > .num_parents = ARRAY_SIZE(gcc_parent_data_8), > + .flags = CLK_OPS_PARENT_ENABLE, This is not the correct way to fix it just because SM8250 and SM6350 uses this ops. We are testing the right fix internally and will be posting. > .ops = &clk_rcg2_floor_ops, > }, > }; -- Thanks, Taniya Das