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From: Julian Vetter <julian@outer-limits.org>
To: Arnd Bergmann <arnd@arndb.de>,
	"David S . Miller" <davem@davemloft.net>,
	Andreas Larsson <andreas@gaisler.com>
Cc: sparclinux@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] sparc: Remove IO memcpy and memset from sparc code
Date: Fri, 30 Oct 2026 10:03:23 +0100	[thread overview]
Message-ID: <82307061-8bbb-4e42-89cf-cb0b5ab1442f@outer-limits.org> (raw)
In-Reply-To: <e26b3c92-5213-44f3-8914-5ee8fb2d662a@app.fastmail.com>

On 10/29/26 16:13, Arnd Bergmann wrote:
> On Thu, Oct 29, 2026, at 15:53, Julian Vetter wrote:
>> Remove the IO memcpy and memset from sparc specific code and fall back
>> to the implementations from lib/iomem_copy.c. They use word accesses if
>> the buffers are aligned and only fall back to byte accesses for
>> potentially unaligned parts of a buffer, while the sparc versions always
>> use byte-wise readb()/writeb() accesses. Other architectures, such as
>> arm64, csky, loongarch and parisc, have already been converted to the
>> generic implementation.
>>
>> This does not drop any memory barriers. The sparc versions don't use
>> mb(), and the rmb()/wmb() implied by readb()/writeb() on sparc32 and
>> sparc64 are only compiler barriers.
> 
> Hi Julian,
> 
> I suspect the sparc64 patch is wrong because the generic
> code relies on __raw_readq()/__raw_readl() to produce
> native-endian data, while the sparc64 version looks like
> they work on little-endian data the same way as readq()/readl().
> 
> Do you know if the PCI host bridge on sparc64 does an implicit
> byte swap for memory space? If it does, the __raw_ accessors
> have to flip swap the data another time for this to work.
> 
>        Arnd

Hello Arnd,
thank you for your reply! I'm not sure, but to me it seems unlikely that 
the PCI host bridge swaps. On sparc64 readl()/readq() use the flag 
ASI_PHYS_BYPASS_EC_E_L, so they work on little-endian data. The CPU does 
the byte swap here. The __raw_*() accessors use ASI_PHYS_BYPASS_EC_E, 
which does not swap (which are used in lib/io_memcpy.c as well), so they 
return the data in address order. If the PCI host bridge also swapped, 
readl() would return double-swapped values, no?

And other I/O functions, e.g., readsl()/writesl() and 
ioread32_rep()/iowrite32_rep() end up in insl()/outsl() in 
arch/sparc/lib/PeeCeeI.c, which copy buffers with 
__raw_readl()/__raw_writel(). And __ioread32_copy()/__iowrite32_copy() 
in lib/iomap_copy.c use the __raw_ accessors on sparc64 as well.

But that's just from me looking at the code and compiling the 
sparc32_defconfig and sparc64_defconfig. I have no sparc platform, so 
can't test it. Maybe some sparc expert can comment.

Julian

  reply	other threads:[~2026-10-30  9:03 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-29 14:53 Julian Vetter
2026-10-29 15:13 ` Arnd Bergmann
2026-10-30  9:03   ` Julian Vetter [this message]
2026-10-30  9:26     ` Arnd Bergmann

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