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From: Tao Zhang <quic_taozha@quicinc.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Konrad Dybcio <konradybcio@gmail.com>,
	Mike Leach <mike.leach@linaro.org>
Cc: Jinlong Mao <quic_jinlmao@quicinc.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	<coresight@lists.linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	Tingwei Zhang <quic_tingweiz@quicinc.com>,
	Yuanfang Zhang <quic_yuanfang@quicinc.com>,
	Trilok Soni <quic_tsoni@quicinc.com>,
	Hao Zhang <quic_hazha@quicinc.com>,
	<linux-arm-msm@vger.kernel.org>, <bjorn.andersson@linaro.org>
Subject: Re: [PATCH 9/9] coresight-tpdm: Add nodes for timestamp request
Date: Thu, 27 Oct 2022 22:46:50 +0800	[thread overview]
Message-ID: <8254cb9e-92ca-4e0b-3048-ef1a8383e9d7@quicinc.com> (raw)
In-Reply-To: <08201626-9998-6327-b5f7-e49ad279fd0f@arm.com>

Hi Suzuki,

On 10/25/2022 6:00 PM, Suzuki K Poulose wrote:
> On 08/09/2022 09:45, Tao Zhang wrote:
>> Add nodes to configure the timestamp request based on input
>> pattern match. Each TPDM that support DSB subunit has n(0-7) TPR
>> registers to configure value for timestamp request based on input
>> pattern match, and has m(0-7) TPMR registers to configure pattern
>> mask for timestamp request.
>> Add nodes to enable/disable pattern timestamp and set pattern
>> timestamp type.
>>
>> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
>> ---
>>   drivers/hwtracing/coresight/coresight-tpdm.c | 189 
>> +++++++++++++++++++++++++++
>>   drivers/hwtracing/coresight/coresight-tpdm.h |  14 ++
>>   2 files changed, 203 insertions(+)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c 
>> b/drivers/hwtracing/coresight/coresight-tpdm.c
>> index 648bbe6..4212ff4 100644
>> --- a/drivers/hwtracing/coresight/coresight-tpdm.c
>> +++ b/drivers/hwtracing/coresight/coresight-tpdm.c
>> @@ -32,6 +32,13 @@ static void tpdm_enable_dsb(struct tpdm_drvdata 
>> *drvdata)
>>                  drvdata->base + TPDM_DSB_EDCMR(i));
>>         for (i = 0; i < TPDM_DSB_MAX_PATT; i++) {
>> +        writel_relaxed(drvdata->dsb->patt_val[i],
>> +                drvdata->base + TPDM_DSB_TPR(i));
>> +        writel_relaxed(drvdata->dsb->patt_mask[i],
>> +                drvdata->base + TPDM_DSB_TPMR(i));
>> +    }
>> +
>> +    for (i = 0; i < TPDM_DSB_MAX_PATT; i++) {
>>           writel_relaxed(drvdata->dsb->trig_patt_val[i],
>>                   drvdata->base + TPDM_DSB_XPR(i));
>>           writel_relaxed(drvdata->dsb->trig_patt_mask[i],
>> @@ -39,6 +46,16 @@ static void tpdm_enable_dsb(struct tpdm_drvdata 
>> *drvdata)
>>       }
>>         val = readl_relaxed(drvdata->base + TPDM_DSB_TIER);
>> +    /* Set pattern timestamp type and enablement */
>> +    if (drvdata->dsb->patt_ts) {
>> +        val |= TPDM_DSB_PATT_TSENAB;
>> +        if (drvdata->dsb->patt_type)
>> +            val |= TPDM_DSB_PATT_TYPE;
>> +        else
>> +            val &= ~TPDM_DSB_PATT_TYPE;
>> +    } else {
>> +        val &= ~TPDM_DSB_PATT_TSENAB;
>> +    }
>>       /* Set trigger timestamp */
>>       if (drvdata->dsb->trig_ts)
>>           val |= TPDM_DSB_XTRIG_TSENAB;
>> @@ -411,6 +428,174 @@ static ssize_t dsb_edge_ctrl_mask_store(struct 
>> device *dev,
>>   }
>>   static DEVICE_ATTR_RW(dsb_edge_ctrl_mask);
>>   +static ssize_t dsb_patt_val_show(struct device *dev,
>> +                      struct device_attribute *attr,
>> +                      char *buf)
>> +{
>> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> +    ssize_t size = 0;
>> +    int i = 0;
>> +
>> +    if (!(drvdata->datasets & TPDM_PIDR0_DS_DSB))
>> +        return -EPERM;
>> +
>> +    spin_lock(&drvdata->spinlock);
>> +    for (i = 0; i < TPDM_DSB_MAX_PATT; i++) {
>> +        size += scnprintf(buf + size, PAGE_SIZE - size,
>> +                  "Index: 0x%x Value: 0x%x\n", i,
>> +                  drvdata->dsb->patt_val[i]);
>> +    }
>> +    spin_unlock(&drvdata->spinlock);
>> +    return size;
>> +}
>> +
>> +/*
>> + * value 1: Index of TPR register
>> + * value 2: Value need to be written
>> + */
>> +static ssize_t dsb_patt_val_store(struct device *dev,
>> +                       struct device_attribute *attr,
>> +                       const char *buf,
>> +                       size_t size)
>> +{
>> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> +    unsigned long index, val;
>> +
>> +    if (sscanf(buf, "%lx %lx", &index, &val) != 2)
>> +        return -EINVAL;
>> +    if (!(drvdata->datasets & TPDM_PIDR0_DS_DSB) ||
>> +        index >= TPDM_DSB_MAX_PATT)
>> +        return -EPERM;
>> +
>> +    spin_lock(&drvdata->spinlock);
>> +    drvdata->dsb->patt_val[index] = val;
>> +    spin_unlock(&drvdata->spinlock);
>> +    return size;
>> +}
>> +static DEVICE_ATTR_RW(dsb_patt_val);
>> +
>> +static ssize_t dsb_patt_mask_show(struct device *dev,
>> +                       struct device_attribute *attr,
>> +                       char *buf)
>> +{
>> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> +    ssize_t size = 0;
>> +    int i = 0;
>> +
>> +    if (!(drvdata->datasets & TPDM_PIDR0_DS_DSB))
>> +        return -EPERM;
>> +
>> +    spin_lock(&drvdata->spinlock);
>> +    for (i = 0; i < TPDM_DSB_MAX_PATT; i++) {
>> +        size += scnprintf(buf + size, PAGE_SIZE - size,
>> +                  "Index: 0x%x Value: 0x%x\n", i,
>> +                  drvdata->dsb->patt_mask[i]);
>> +    }
>> +    spin_unlock(&drvdata->spinlock);
>> +    return size;
>> +}
>> +
>> +/*
>> + * value 1: Index of TPMR register
>> + * value 2: Value need to be written
>> + */
>> +static ssize_t dsb_patt_mask_store(struct device *dev,
>> +                    struct device_attribute *attr,
>> +                    const char *buf,
>> +                    size_t size)
>> +{
>> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> +    unsigned long index, val;
>> +
>> +    if (sscanf(buf, "%lx %lx", &index, &val) != 2)
>> +        return -EINVAL;
>> +    if (!(drvdata->datasets & TPDM_PIDR0_DS_DSB) ||
>> +        index >= TPDM_DSB_MAX_PATT)
>> +        return -EPERM;
>> +
>> +    spin_lock(&drvdata->spinlock);
>> +    drvdata->dsb->patt_mask[index] = val;
>> +    spin_unlock(&drvdata->spinlock);
>> +    return size;
>> +}
>> +static DEVICE_ATTR_RW(dsb_patt_mask);
>> +
>> +static ssize_t dsb_patt_ts_show(struct device *dev,
>> +                     struct device_attribute *attr,
>> +                     char *buf)
>> +{
>> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> +
>> +    if (!(drvdata->datasets & TPDM_PIDR0_DS_DSB))
>> +        return -EPERM;
>> +
>> +    return scnprintf(buf, PAGE_SIZE, "%u\n",
>> +             (unsigned int)drvdata->dsb->patt_ts);
>
> Please use sysfs_emit() everywhere (in the previous patches too)
> for such operations.
>
Sure, I will update this in the next patch series.

> I have finished reviewing this series.
>
> Suzuki
> _______________________________________________
> CoreSight mailing list -- coresight@lists.linaro.org
> To unsubscribe send an email to coresight-leave@lists.linaro.org

      reply	other threads:[~2022-10-27 14:47 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-08  8:44 [PATCH 0/9] Add support to configure TPDM DSB subunit Tao Zhang
2022-09-08  8:44 ` [PATCH 1/9] dt-bindings: arm: Add support for DSB element Tao Zhang
2022-09-08 10:54   ` Krzysztof Kozlowski
2022-09-13  7:00     ` Tao Zhang
2022-09-13  9:14       ` Krzysztof Kozlowski
2022-09-13  0:48   ` Rob Herring
2022-09-13  7:56     ` Tao Zhang
2022-09-08  8:44 ` [PATCH 2/9] coresight-tpda: Add DSB dataset support Tao Zhang
2022-09-15 10:14   ` Suzuki K Poulose
2022-09-20 13:40     ` Tao Zhang
2022-09-08  8:44 ` [PATCH 3/9] coresight-tpdm: Initialize DSB subunit configuration Tao Zhang
2022-10-24 10:02   ` Suzuki K Poulose
     [not found]     ` <72af1fa4-fa64-7f23-4000-db6d6a9f7f22@quicinc.com>
2022-10-26 14:18       ` Suzuki K Poulose
2022-09-08  8:45 ` [PATCH 4/9] coresight-tpdm: Add reset node to TPDM node Tao Zhang
2022-10-24 10:10   ` Suzuki K Poulose
2022-10-27  6:52     ` Tao Zhang
2022-09-08  8:45 ` [PATCH 5/9] coresight-tpdm: Add nodes to set trigger timestamp and type Tao Zhang
2022-10-24 10:32   ` Suzuki K Poulose
2022-10-27  6:53     ` Tao Zhang
2022-09-08  8:45 ` [PATCH 6/9] coresight-tpdm: Add node to set dsb programming mode Tao Zhang
2022-10-24 14:49   ` Suzuki K Poulose
2022-10-27  6:55     ` Tao Zhang
2022-09-08  8:45 ` [PATCH 7/9] coresight-tpdm: Add nodes for dsb element creation Tao Zhang
2022-10-24 15:47   ` Suzuki K Poulose
2022-09-08  8:45 ` [PATCH 8/9] coresight-tpdm: Add nodes to configure pattern match output Tao Zhang
2022-10-24 15:51   ` Suzuki K Poulose
2022-09-08  8:45 ` [PATCH 9/9] coresight-tpdm: Add nodes for timestamp request Tao Zhang
2022-10-25 10:00   ` Suzuki K Poulose
2022-10-27 14:46     ` Tao Zhang [this message]

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