From: "Naveen N Rao (AMD)" <naveen@kernel.org>
To: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Vasant Hegde <vasant.hegde@amd.com>,
Pankaj Gupta <pankaj.gupta@amd.com>,
Alejandro Jimenez <alejandro.j.jimenez@oracle.com>,
Joao Martins <joao.m.martins@oracle.com>,
Nikunj A Dadhania <nikunj@amd.com>
Subject: [PATCH v4 2/7] KVM: SVM: Add a helper to look up the max physical ID for AVIC
Date: Thu, 21 Aug 2025 23:48:33 +0530 [thread overview]
Message-ID: <82992eac8f3a2424373001d76526f418276532a5.1755797611.git.naveen@kernel.org> (raw)
In-Reply-To: <cover.1755797611.git.naveen@kernel.org>
To help with a future change, add a helper to look up the maximum
physical ID depending on the vCPU AVIC mode. No functional change
intended.
Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Naveen N Rao (AMD) <naveen@kernel.org>
---
arch/x86/kvm/svm/avic.c | 26 ++++++++++++++++++++------
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index a6908ac5298d..4f00e31347c3 100644
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -79,13 +79,31 @@ static bool next_vm_id_wrapped = 0;
static DEFINE_SPINLOCK(svm_vm_data_hash_lock);
bool x2avic_enabled;
+static u32 avic_get_max_physical_id(struct kvm_vcpu *vcpu)
+{
+ u32 arch_max;
+
+ if (x2avic_enabled && apic_x2apic_mode(vcpu->arch.apic))
+ arch_max = X2AVIC_MAX_PHYSICAL_ID;
+ else
+ arch_max = AVIC_MAX_PHYSICAL_ID;
+
+ /*
+ * Despite its name, KVM_CAP_MAX_VCPU_ID represents the maximum APIC ID plus one,
+ * so the max possible APIC ID is one less than that.
+ */
+ return min(vcpu->kvm->arch.max_vcpu_ids - 1, arch_max);
+}
+
static void avic_activate_vmcb(struct vcpu_svm *svm)
{
struct vmcb *vmcb = svm->vmcb01.ptr;
- struct kvm *kvm = svm->vcpu.kvm;
+ struct kvm_vcpu *vcpu = &svm->vcpu;
vmcb->control.int_ctl &= ~(AVIC_ENABLE_MASK | X2APIC_MODE_MASK);
+
vmcb->control.avic_physical_id &= ~AVIC_PHYSICAL_MAX_INDEX_MASK;
+ vmcb->control.avic_physical_id |= avic_get_max_physical_id(vcpu);
vmcb->control.int_ctl |= AVIC_ENABLE_MASK;
@@ -98,8 +116,7 @@ static void avic_activate_vmcb(struct vcpu_svm *svm)
*/
if (x2avic_enabled && apic_x2apic_mode(svm->vcpu.arch.apic)) {
vmcb->control.int_ctl |= X2APIC_MODE_MASK;
- vmcb->control.avic_physical_id |= min(kvm->arch.max_vcpu_ids - 1,
- X2AVIC_MAX_PHYSICAL_ID);
+
/* Disabling MSR intercept for x2APIC registers */
svm_set_x2apic_msr_interception(svm, false);
} else {
@@ -109,9 +126,6 @@ static void avic_activate_vmcb(struct vcpu_svm *svm)
*/
kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, &svm->vcpu);
- /* For xAVIC and hybrid-xAVIC modes */
- vmcb->control.avic_physical_id |= min(kvm->arch.max_vcpu_ids - 1,
- AVIC_MAX_PHYSICAL_ID);
/* Enabling MSR intercept for x2APIC registers */
svm_set_x2apic_msr_interception(svm, true);
}
--
2.50.1
next prev parent reply other threads:[~2025-08-21 18:22 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-21 18:18 [PATCH v4 0/7] KVM: SVM: Add support for 4k vCPUs with x2AVIC Naveen N Rao (AMD)
2025-08-21 18:18 ` [PATCH v4 1/7] KVM: SVM: Limit AVIC physical max index based on configured max_vcpu_ids Naveen N Rao (AMD)
2025-08-21 18:18 ` Naveen N Rao (AMD) [this message]
2025-08-21 18:18 ` [PATCH v4 3/7] KVM: SVM: Replace hard-coded value 0x1FF with the corresponding macro Naveen N Rao (AMD)
2025-08-21 18:18 ` [PATCH v4 4/7] KVM: SVM: Expand AVIC_PHYSICAL_MAX_INDEX_MASK to be a 12-bit field Naveen N Rao (AMD)
2025-08-21 18:18 ` [PATCH v4 5/7] KVM: SVM: Move AVIC Physical ID table allocation to vcpu_precreate() Naveen N Rao (AMD)
2025-08-21 18:18 ` [PATCH v4 6/7] x86/cpufeatures: Add X86_FEATURE_X2AVIC_EXT Naveen N Rao (AMD)
2025-08-21 18:18 ` [PATCH v4 7/7] KVM: SVM: Add AVIC support for 4k vCPUs in x2AVIC mode Naveen N Rao (AMD)
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