From: Tom Lendacky <thomas.lendacky@amd.com>
To: Thomas Gleixner <tglx@linutronix.de>, Borislav Petkov <bp@alien8.de>
Cc: linux-kernel@vger.kernel.org, David Woodhouse <dwmw@amazon.co.uk>,
x86 <x86@kernel.org>, Qian Cai <cai@redhat.com>
Subject: Re: [tip: x86/apic] x86/io_apic: Cleanup trigger/polarity helpers
Date: Tue, 10 Nov 2020 10:17:29 -0600 [thread overview]
Message-ID: <82d54a74-af90-39a4-e483-b3cd73e2ef03@amd.com> (raw)
In-Reply-To: <87a6vpgqbt.fsf@nanos.tec.linutronix.de>
On 11/10/20 9:54 AM, Thomas Gleixner wrote:
> On Tue, Nov 10 2020 at 08:55, Tom Lendacky wrote:
>> On 11/10/20 8:34 AM, Thomas Gleixner wrote:
>> I was about to send the dmesg output when I saw this. A quick test with
>> this change resolves the boot issue, thanks!
>
> /me feels stupid
>
>> I'm still seeing the warning at arch/x86/kernel/apic/apic.c:2527, but I'll
>> start a separate thread on that.
>
> Can you please provide the backtrace?
Yep. The warning started triggering with:
47bea873cf80 ("x86/msi: Only use high bits of MSI address for DMAR unit")
Here's the backtrace:
[ 15.611109] ------------[ cut here ]------------
[ 15.616274] WARNING: CPU: 184 PID: 1 at arch/x86/kernel/apic/apic.c:2505 __irq_msi_compose_msg+0x79/0x80
[ 15.626855] Modules linked in:
[ 15.630263] CPU: 184 PID: 1 Comm: swapper/0 Not tainted 5.10.0-rc1-sos-custom #1
[ 15.638516] Hardware name: AMD Corporation ETHANOL_X/ETHANOL_X, BIOS REX1006G 01/25/2020
[ 15.647549] RIP: 0010:__irq_msi_compose_msg+0x79/0x80
[ 15.653188] Code: 0f f0 ff 09 d0 89 06 8b 47 04 c7 46 04 00 00 00 00 88 46 08 45 84 c0 74 08 8b 07 30 c0 89 46 04 c3 81 3f ff 00 00 00 77 01 c3 <0f> 0b c3 0f 1f 40 00 0f 1f 44 00 00 8b 05 81 f9 04 02 85 c0 75 16
[ 15.674140] RSP: 0018:ffffc900000c7c30 EFLAGS: 00010212
[ 15.679971] RAX: 0000000000000021 RBX: ffff888143789028 RCX: 0000000000000000
[ 15.687936] RDX: 0000000000000000 RSI: ffffc900000c7c40 RDI: ffff8881447dd1c0
[ 15.695899] RBP: ffff888143789028 R08: 0000000000000000 R09: 0000000000000005
[ 15.703861] R10: 0000000000000002 R11: 0000000000000004 R12: ffff88900e7b80c0
[ 15.711825] R13: 0000000000000000 R14: ffff88907646ba80 R15: 0000000000000000
[ 15.719789] FS: 0000000000000000(0000) GS:ffff88900f000000(0000) knlGS:0000000000000000
[ 15.728821] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 15.735234] CR2: 0000000000000000 CR3: 000000114d40a000 CR4: 0000000000350ee0
[ 15.743197] Call Trace:
[ 15.745929] irq_chip_compose_msi_msg+0x2e/0x40
[ 15.750984] msi_domain_activate+0x4b/0x90
[ 15.755556] __irq_domain_activate_irq+0x53/0x80
[ 15.760707] ? irq_set_msi_desc_off+0x5a/0x90
[ 15.765568] irq_domain_activate_irq+0x25/0x40
[ 15.770525] __msi_domain_alloc_irqs+0x16a/0x310
[ 15.775680] __pci_enable_msi_range+0x182/0x2b0
[ 15.780738] ? e820__memblock_setup+0x7d/0x7d
[ 15.785597] pci_enable_msi+0x16/0x30
[ 15.789685] iommu_init_msi+0x30/0x190
[ 15.793860] state_next+0x39d/0x665
[ 15.797754] ? e820__memblock_setup+0x7d/0x7d
[ 15.802615] iommu_go_to_state+0x24/0x28
[ 15.806993] amd_iommu_init+0x11/0x46
[ 15.811076] pci_iommu_init+0x16/0x3f
[ 15.815165] do_one_initcall+0x44/0x1d0
[ 15.819447] kernel_init_freeable+0x1e7/0x249
[ 15.824311] ? rest_init+0xb4/0xb4
[ 15.828097] kernel_init+0xa/0x10c
[ 15.831889] ret_from_fork+0x22/0x30
[ 15.835883] CPU: 184 PID: 1 Comm: swapper/0 Not tainted 5.10.0-rc1-sos-custom #1
[ 15.836876] Hardware name: AMD Corporation ETHANOL_X/ETHANOL_X, BIOS REX1006G 01/25/2020
[ 15.836876] Call Trace:
[ 15.836876] dump_stack+0x6d/0x88
[ 15.836876] __warn.cold+0x24/0x3d
[ 15.836876] ? __irq_msi_compose_msg+0x79/0x80
[ 15.836876] report_bug+0xd1/0x100
[ 15.836876] handle_bug+0x35/0x80
[ 15.836876] exc_invalid_op+0x14/0x70
[ 15.836876] asm_exc_invalid_op+0x12/0x20
[ 15.836876] RIP: 0010:__irq_msi_compose_msg+0x79/0x80
[ 15.836876] Code: 0f f0 ff 09 d0 89 06 8b 47 04 c7 46 04 00 00 00 00 88 46 08 45 84 c0 74 08 8b 07 30 c0 89 46 04 c3 81 3f ff 00 00 00 77 01 c3 <0f> 0b c3 0f 1f 40 00 0f 1f 44 00 00 8b 05 81 f9 04 02 85 c0 75 16
[ 15.836876] RSP: 0018:ffffc900000c7c30 EFLAGS: 00010212
[ 15.836876] RAX: 0000000000000021 RBX: ffff888143789028 RCX: 0000000000000000
[ 15.836876] RDX: 0000000000000000 RSI: ffffc900000c7c40 RDI: ffff8881447dd1c0
[ 15.836876] RBP: ffff888143789028 R08: 0000000000000000 R09: 0000000000000005
[ 15.836876] R10: 0000000000000002 R11: 0000000000000004 R12: ffff88900e7b80c0
[ 15.836876] R13: 0000000000000000 R14: ffff88907646ba80 R15: 0000000000000000
[ 15.836876] irq_chip_compose_msi_msg+0x2e/0x40
[ 15.836876] msi_domain_activate+0x4b/0x90
[ 15.836876] __irq_domain_activate_irq+0x53/0x80
[ 15.836876] ? irq_set_msi_desc_off+0x5a/0x90
[ 15.836876] irq_domain_activate_irq+0x25/0x40
[ 15.836876] __msi_domain_alloc_irqs+0x16a/0x310
[ 15.836876] __pci_enable_msi_range+0x182/0x2b0
[ 15.836876] ? e820__memblock_setup+0x7d/0x7d
[ 15.836876] pci_enable_msi+0x16/0x30
[ 15.836876] iommu_init_msi+0x30/0x190
[ 15.836876] state_next+0x39d/0x665
[ 15.836876] ? e820__memblock_setup+0x7d/0x7d
[ 15.836876] iommu_go_to_state+0x24/0x28
[ 15.836876] amd_iommu_init+0x11/0x46
[ 15.836876] pci_iommu_init+0x16/0x3f
[ 15.836876] do_one_initcall+0x44/0x1d0
[ 15.836876] kernel_init_freeable+0x1e7/0x249
[ 15.836876] ? rest_init+0xb4/0xb4
[ 15.836876] kernel_init+0xa/0x10c
[ 15.836876] ret_from_fork+0x22/0x30
[ 16.046524] ---[ end trace 2fb272e5ca8df1c8 ]---
Thanks,
Tom
>
> Thanks,
>
> tglx
>
next prev parent reply other threads:[~2020-11-10 16:17 UTC|newest]
Thread overview: 192+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-07 12:20 [PATCH 0/5] Fix x2apic enablement and allow up to 32768 CPUs without IR where supported David Woodhouse
2020-10-07 12:20 ` [PATCH 1/5] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse
2020-10-07 12:20 ` [PATCH 2/5] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse
2020-10-07 12:20 ` [PATCH 3/5] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse
2020-10-08 9:12 ` Peter Zijlstra
2020-10-08 17:05 ` David Woodhouse
2020-10-08 11:41 ` Thomas Gleixner
2020-10-07 12:20 ` [PATCH 4/5] x86/apic: Support 15 bits of APIC ID in IOAPIC/MSI where available David Woodhouse
2020-10-08 11:54 ` Thomas Gleixner
2020-10-08 12:02 ` Thomas Gleixner
2020-10-08 13:00 ` David Woodhouse
2020-10-07 12:20 ` [PATCH 5/5] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse
2020-10-08 12:05 ` Thomas Gleixner
2020-10-08 12:55 ` David Woodhouse
2020-10-08 16:08 ` David Woodhouse
2020-10-08 21:14 ` Thomas Gleixner
2020-10-08 21:39 ` David Woodhouse
2020-10-08 23:27 ` Thomas Gleixner
2020-10-09 6:07 ` David Woodhouse
2020-10-10 10:06 ` David Woodhouse
2020-10-10 11:44 ` Thomas Gleixner
2020-10-10 11:58 ` David Woodhouse
2020-10-11 17:12 ` Thomas Gleixner
2020-10-11 21:15 ` David Woodhouse
2020-10-12 9:33 ` Thomas Gleixner
2020-10-12 16:06 ` David Woodhouse
2020-10-12 18:38 ` Thomas Gleixner
2020-10-12 20:20 ` David Woodhouse
2020-10-12 22:13 ` Thomas Gleixner
2020-10-13 7:52 ` David Woodhouse
2020-10-13 8:11 ` [PATCH 0/9] Remove irq_remapping_get_irq_domain() David Woodhouse
2020-10-13 8:11 ` [PATCH 1/9] genirq/irqdomain: Implement get_name() method on irqchip fwnodes David Woodhouse
2020-10-13 8:11 ` [PATCH 2/9] x86/apic: Add select() method on vector irqdomain David Woodhouse
2020-10-13 8:11 ` [PATCH 3/9] iommu/amd: Implement select() method on remapping irqdomain David Woodhouse
2020-10-13 8:11 ` [PATCH 4/9] iommu/vt-d: " David Woodhouse
2020-10-13 8:11 ` [PATCH 5/9] iommu/hyper-v: " David Woodhouse
2020-10-13 8:11 ` [PATCH 6/9] x86/hpet: Use irq_find_matching_fwspec() to find " David Woodhouse
2020-10-13 8:11 ` [PATCH 7/9] x86/ioapic: " David Woodhouse
2020-10-13 8:11 ` [PATCH 8/9] x86: Kill all traces of irq_remapping_get_irq_domain() David Woodhouse
2020-10-13 8:11 ` [PATCH 9/9] iommu/vt-d: Simplify intel_irq_remapping_select() David Woodhouse
2020-10-13 9:28 ` [PATCH 5/5] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID Thomas Gleixner
2020-10-13 10:15 ` David Woodhouse
2020-10-13 10:46 ` Thomas Gleixner
2020-10-13 10:53 ` David Woodhouse
2020-10-13 11:51 ` David Woodhouse
2020-10-13 12:40 ` Thomas Gleixner
2020-10-08 11:46 ` [PATCH 1/5] x86/apic: Fix x2apic enablement without interrupt remapping Thomas Gleixner
2020-10-09 10:46 ` [PATCH v2 0/8] Fix x2apic enablement and allow up to 32768 CPUs without IR where supported David Woodhouse
2020-10-09 10:46 ` [PATCH v2 1/8] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse
2020-10-09 10:46 ` [PATCH v2 2/8] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse
2020-10-09 10:46 ` [PATCH v2 3/8] x86/apic: Always provide irq_compose_msi_msg() method for vector domain David Woodhouse
2020-10-09 10:46 ` [PATCH v2 4/8] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse
2020-10-09 10:46 ` [PATCH v2 5/8] x86/apic: Support 15 bits of APIC ID in MSI where available David Woodhouse
2020-10-09 10:46 ` [PATCH v2 6/8] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse
2020-10-09 10:46 ` [PATCH v2 7/8] x86/hpet: Move MSI support into hpet.c David Woodhouse
2020-10-09 10:46 ` [PATCH v2 8/8] x86/ioapic: Generate RTE directly from parent irqchip's MSI message David Woodhouse
2020-10-22 21:43 ` Thomas Gleixner
2020-10-22 22:10 ` Thomas Gleixner
2020-10-23 17:04 ` David Woodhouse
2020-10-23 10:10 ` David Woodhouse
2020-10-23 21:28 ` Thomas Gleixner
2020-10-24 8:26 ` David Woodhouse
2020-10-24 8:41 ` David Woodhouse
2020-10-24 9:13 ` Paolo Bonzini
2020-10-24 10:13 ` David Woodhouse
2020-10-24 12:44 ` David Woodhouse
2020-10-24 21:35 ` [PATCH v3 00/35] Fix x2apic enablement and allow more CPUs, clean up I/OAPIC and MSI bitfields David Woodhouse
2020-10-24 21:35 ` [PATCH v3 01/35] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 02/35] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 03/35] x86/apic/uv: Fix inconsistent destination mode David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 04/35] x86/devicetree: Fix the ioapic interrupt type table David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 05/35] x86/apic: Cleanup delivery mode defines David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 06/35] x86/apic: Replace pointless apic::dest_logical usage David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] x86/apic: Replace pointless apic:: Dest_logical usage tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 07/35] x86/apic: Get rid of apic::dest_logical David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] x86/apic: Get rid of apic:: Dest_logical tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 08/35] x86/apic: Cleanup destination mode David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 09/35] x86/apic: Always provide irq_compose_msi_msg() method for vector domain David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 10/35] x86/hpet: Move MSI support into hpet.c David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 11/35] genirq/msi: Allow shadow declarations of msi_msg::$member David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] genirq/msi: Allow shadow declarations of msi_msg:: $member tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 12/35] x86/msi: Provide msi message shadow structs David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2022-04-06 8:36 ` [PATCH v3 12/35] " Reto Buerki
2022-04-06 8:36 ` [PATCH] x86/msi: Fix msi message data shadow struct Reto Buerki
2022-04-06 22:11 ` Thomas Gleixner
2022-04-07 11:06 ` Reto Buerki
2022-04-07 13:24 ` [tip: x86/urgent] " tip-bot2 for Reto Buerki
2022-04-06 22:07 ` [PATCH v3 12/35] x86/msi: Provide msi message shadow structs Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 13/35] iommu/intel: Use msi_msg " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 14/35] iommu/amd: " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 15/35] PCI: vmd: " David Woodhouse
2020-10-28 20:49 ` Kees Cook
2020-10-28 21:13 ` Thomas Gleixner
2020-10-28 23:22 ` Kees Cook
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 16/35] x86/kvm: " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 17/35] x86/pci/xen: " David Woodhouse
2020-10-25 9:49 ` David Laight
2020-10-25 10:26 ` David Woodhouse
2020-10-25 13:20 ` David Laight
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 18/35] x86/msi: Remove msidef.h David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 19/35] x86/io_apic: Cleanup trigger/polarity helpers David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-11-09 23:15 ` Tom Lendacky
2020-11-10 3:30 ` [EXTERNAL] " David Woodhouse
2020-11-10 6:10 ` Borislav Petkov
2020-11-10 14:34 ` Thomas Gleixner
2020-11-10 14:55 ` Tom Lendacky
2020-11-10 15:54 ` Thomas Gleixner
2020-11-10 16:01 ` [EXTERNAL] " David Woodhouse
2020-11-10 16:17 ` Tom Lendacky [this message]
2020-11-10 16:33 ` David Woodhouse
2020-11-10 17:04 ` Tom Lendacky
2020-11-10 17:50 ` Thomas Gleixner
2020-11-10 18:56 ` Thomas Gleixner
2020-11-10 19:21 ` David Woodhouse
2020-11-10 21:01 ` Thomas Gleixner
2020-11-10 21:30 ` David Woodhouse
2020-11-10 22:00 ` Tom Lendacky
2020-11-10 22:48 ` Thomas Gleixner
2020-11-10 23:05 ` Tom Lendacky
2020-11-11 8:16 ` David Woodhouse
2020-11-11 9:46 ` Thomas Gleixner
2020-11-11 10:36 ` David Woodhouse
2020-11-11 12:32 ` David Woodhouse
2020-11-11 20:30 ` Tom Lendacky
2020-11-11 21:19 ` David Woodhouse
2020-11-13 15:14 ` David Woodhouse
2020-11-16 18:02 ` David Woodhouse
2020-11-17 2:00 ` Suravee Suthikulpanit
2020-11-18 10:29 ` Suravee Suthikulpanit
2020-11-18 10:52 ` David Woodhouse
2020-11-18 14:06 ` Thomas Gleixner
2020-11-18 16:51 ` Suravee Suthikulpanit
2020-11-18 17:08 ` David Woodhouse
2020-11-18 20:16 ` [tip: x86/apic] iommu/amd: Fix IOMMU interrupt generation in X2APIC mode tip-bot2 for David Woodhouse
2020-11-11 14:43 ` [PATCH 1/3] iommu/amd: Don't register interrupt remapping irqdomain when IR is disabled David Woodhouse
2020-11-11 14:43 ` [PATCH 2/3] iommu/amd: Fix union of bitfields in intcapxt support David Woodhouse
2020-11-11 22:06 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-11-11 14:43 ` [PATCH 3/3] iommu/amd: Fix IOMMU interrupt generation in X2APIC mode David Woodhouse
2020-11-11 22:06 ` [tip: x86/apic] iommu/amd: Don't register interrupt remapping irqdomain when IR is disabled tip-bot2 for David Woodhouse
2020-11-10 17:47 ` [tip: x86/apic] x86/ioapic: Correct the PCI/ISA trigger type selection tip-bot2 for Thomas Gleixner
2020-11-10 6:31 ` [PATCH v3 19/35] x86/io_apic: Cleanup trigger/polarity helpers Qian Cai
2020-11-10 8:59 ` David Woodhouse
2020-11-10 16:26 ` Paolo Bonzini
2020-10-24 21:35 ` [PATCH v3 20/35] x86/ioapic: Cleanup IO/APIC route entry structs David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 21/35] x86/ioapic: Generate RTE directly from parent irqchip's MSI message David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 22/35] genirq/irqdomain: Implement get_name() method on irqchip fwnodes David Woodhouse
2020-10-25 9:41 ` Marc Zyngier
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 23/35] x86/apic: Add select() method on vector irqdomain David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 24/35] iommu/amd: Implement select() method on remapping irqdomain David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 25/35] iommu/vt-d: " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 26/35] iommu/hyper-v: " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 27/35] x86/hpet: Use irq_find_matching_fwspec() to find " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 28/35] x86/ioapic: " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 29/35] x86: Kill all traces of irq_remapping_get_irq_domain() David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 30/35] iommu/vt-d: Simplify intel_irq_remapping_select() David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 31/35] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 32/35] x86/apic: Support 15 bits of APIC ID in MSI where available David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 33/35] iommu/hyper-v: Disable IRQ pseudo-remapping if 15 bit APIC IDs are available David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 34/35] x86/kvm: Reserve KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse
2020-10-24 21:35 ` [PATCH v3 35/35] x86/kvm: Enable 15-bit extension when KVM_FEATURE_MSI_EXT_DEST_ID detected David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-25 8:12 ` [PATCH v3 00/35] Fix x2apic enablement and allow more CPUs, clean up I/OAPIC and MSI bitfields David Woodhouse
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