From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752732AbdK1Ohn (ORCPT ); Tue, 28 Nov 2017 09:37:43 -0500 Received: from foss.arm.com ([217.140.101.70]:54380 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751716AbdK1Ohm (ORCPT ); Tue, 28 Nov 2017 09:37:42 -0500 Subject: Re: [question] extract the feature bits width to 4 To: gengdongjiu Cc: "mark.rutland@arm.com" , Linux Kernel Mailing List , "linux-arm-kernel@lists.infradead.org" References: <17ab0a11-7ca2-ff22-35d6-7446dbccc3ea@huawei.com> From: Suzuki K Poulose Message-ID: <82d7525a-558e-619a-4235-c20d6011f7cf@arm.com> Date: Tue, 28 Nov 2017 14:37:39 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/11/17 12:38, gengdongjiu wrote: > > On 2017/11/28 19:40, Suzuki K Poulose wrote: >> Cc: linux-arm-kernel >> >> On 28/11/17 11:17, gengdongjiu wrote: >>> Hi,suzuki/mark, >> >> Hello! >> >> Please Cc linux-arm-kernel mailing list in the future for any arm/arm64 kernel >> related queries. > Thanks a lot for the reply, Ok > >> >>> >>>    very sorry to disturb you, I have a question that want to consult with you. For the CPU feature detection, >>> why we use extract 4 bits width for the feature match instead of the actual bits number[1]?  may be the actual hardware feature bit more than 4 bits. >> >> >> There are features which could be more or less than 4bit wide. However, >> all the arm64_cpu_capabilities features are 4bits and hence the hard coded >> bits there. If we ever come across handling capabilities which are not >> standard size, we could add the necessary code to support it. > yes, normally the arm64_cpu_capabilities features are 4bits. However, in my > platform, there is a private CPU feature which is more than 4bits. > >> >> Are you planning to add something which does require the change ? Please >> feel free to send patches. > > If I support this feature, I have to change it and not use 4bits. This CPU > feature is private, I does not want to upstream the whole feature. > > If I only send the change about using actual width instead of 4 bits when detection feature , > I am not sure you are agree. Well, if the feature is not going to be upstream, the change may not be accepted. You could always add your custom code for "matching" the capability, like for e.g, ARM64_HAS_VIRT_HOST_EXTN. Cheers Suzuki