From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Mateusz Majewski <m.majewski2@samsung.com>,
linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org, Tomasz Figa <tomasz.figa@gmail.com>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Alim Akhtar <alim.akhtar@samsung.com>,
Linus Walleij <linus.walleij@linaro.org>,
Marek Szyprowski <m.szyprowski@samsung.com>
Subject: Re: [PATCH 0/4] Fix Samsung pinctrl driver static allocation of GPIO base warning
Date: Mon, 9 Oct 2023 11:42:07 +0200 [thread overview]
Message-ID: <82e30bd1-b7b4-4d95-9f13-008398082ca0@linaro.org> (raw)
In-Reply-To: <CAPLW+4nyLunQw+wCxQmw9VDCGx2ECeAhUzjKRCBeHW7fGS1dFA@mail.gmail.com>
On 08/10/2023 20:45, Sam Protsenko wrote:
>>>
>>> Thank you for handling this! Those deprecation warnings have been
>>> bugging me for some time :) While testing this series on my E850-96
>>> board (Exynos850 based), I noticed some changes in
>>> /sys/kernel/debug/gpio file, like these:
>>>
>>> 8<------------------------------------------------------------------------------------------>8
>>> -gpiochip0: GPIOs 0-7, parent: platform/11850000.pinctrl, gpa0:
>>> - gpio-7 ( |Volume Up ) in hi IRQ ACTIVE LOW
>>> +gpiochip0: GPIOs 512-519, parent: platform/11850000.pinctrl, gpa0:
>>> + gpio-519 ( |Volume Up ) in hi IRQ ACTIVE LOW
>>>
>>> -gpiochip1: GPIOs 8-15, parent: platform/11850000.pinctrl, gpa1:
>>> - gpio-8 ( |Volume Down ) in hi IRQ ACTIVE LOW
>>> +gpiochip1: GPIOs 520-527, parent: platform/11850000.pinctrl, gpa1:
>>> + gpio-520 ( |Volume Down ) in hi IRQ ACTIVE LOW
>>>
>>> -gpiochip2: GPIOs 16-23, parent: platform/11850000.pinctrl, gpa2:
>>> +gpiochip2: GPIOs 528-535, parent: platform/11850000.pinctrl, gpa2:
>>>
>>> ...
>>> 8<------------------------------------------------------------------------------------------>8
>>>
>>> So basically it looks like all line numbers were offset by 512. Can
>>> you please comment on this? Is it an intentional change, and why it's
>>> happening?
>>>
>>> Despite of that change, everything seems to be working fine. But I
>>> kinda liked the numeration starting from 0 better :)
>>
>> Could it be the reason of dynamic allocation?
>>
>
> I just asked because I didn't know :) But ok, if you want me to do
> some digging... It seems like having GPIO_DYNAMIC_BASE=512 is not
> necessarily the reason of dynamic allocation, but instead just a way
> to keep 0-512 range for legacy GPIO drivers which might use that area
> to allocate GPIO numbers statically. It's mentioned here:
>
> /*
> * At the end we want all GPIOs to be dynamically allocated from 0.
> * However, some legacy drivers still perform fixed allocation.
> * Until they are all fixed, leave 0-512 space for them.
> */
> #define GPIO_DYNAMIC_BASE 512
>
> As mentioned in another comment in gpiochip_add_data_with_key(), that
> numberspace shouldn't matter and in the end should go away, as GPIO
> sysfs interface is pretty much deprecated at this point, and everybody
> should stick to GPIO descriptors.
>
> Anyway, now that it's clear that the base number change was intended
> and shouldn't matter, for all patches in the series:
>
> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
> Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
If all the GPIOs changed due to switch to dynamic allocation, aren't we
breaking all user-space users?
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-10-09 9:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20231006130032eucas1p18c6f5c39614768911730fa6ed0201ee3@eucas1p1.samsung.com>
2023-10-06 12:55 ` Mateusz Majewski
[not found] ` <CGME20231006130038eucas1p1c849a21714227a11759681ef909ffd94@eucas1p1.samsung.com>
2023-10-06 12:55 ` [PATCH 1/4] pinctrl: samsung: defer pinctrl_enable Mateusz Majewski
2023-10-07 2:14 ` Sam Protsenko
[not found] ` <CGME20231006130041eucas1p1fd945c734c0d35067107e7c699201bdb@eucas1p1.samsung.com>
2023-10-06 12:55 ` [PATCH 2/4] pinctrl: samsung: use add_pin_ranges method to add pinctrl ranges Mateusz Majewski
[not found] ` <CGME20231006130042eucas1p10679037ebd812183a5edff0b7c1e8b6a@eucas1p1.samsung.com>
2023-10-06 12:55 ` [PATCH 3/4] pinctrl: samsung: choose GPIO numberspace base dynamically Mateusz Majewski
[not found] ` <CGME20231006130044eucas1p17a141ec5aafca3d5af5295049f8b1651@eucas1p1.samsung.com>
2023-10-06 12:55 ` [PATCH 4/4] pinctrl: samsung: do not offset pinctrl numberspaces Mateusz Majewski
2023-10-07 2:14 ` [PATCH 0/4] Fix Samsung pinctrl driver static allocation of GPIO base warning Sam Protsenko
2023-10-08 13:09 ` Krzysztof Kozlowski
2023-10-08 18:45 ` Sam Protsenko
2023-10-09 9:42 ` Krzysztof Kozlowski [this message]
2023-10-09 9:52 ` Marek Szyprowski
2023-10-09 10:02 ` Marek Szyprowski
2023-10-09 10:38 ` Krzysztof Kozlowski
2023-10-10 12:09 ` Linus Walleij
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