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Thu, 08 May 2025 16:38:51 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 548GcoXj017462 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 8 May 2025 16:38:50 GMT Received: from [10.216.33.253] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 8 May 2025 09:38:45 -0700 Message-ID: <82e6c229-8852-4ae9-add0-5fdc0a15f7c5@quicinc.com> Date: Thu, 8 May 2025 22:08:41 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/7] arm64: dts: qcom: qcs6490-audioreach: Modify LPASS macros clock settings for audioreach To: Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , , , Mohammad Rafi Shaik References: <20250429092430.21477-1-quic_pkumpatl@quicinc.com> <20250429092430.21477-4-quic_pkumpatl@quicinc.com> <12ccf19f-10f9-42a7-b61d-fd54d5922bf7@oss.qualcomm.com> Content-Language: en-US From: Prasad Kumpatla In-Reply-To: <12ccf19f-10f9-42a7-b61d-fd54d5922bf7@oss.qualcomm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=Lu2Symdc c=1 sm=1 tr=0 ts=681cde1b cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=COk6AnOGAAAA:8 a=EkdEwCnvp131_jYCVQ4A:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: SN4UZCTYLQiUCmDajeFXvTges2PiM95O X-Proofpoint-ORIG-GUID: SN4UZCTYLQiUCmDajeFXvTges2PiM95O X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTA4MDE0NSBTYWx0ZWRfX0U8hza35FXr7 bgcZx3Oz38FdEWwUmvoM/LbYP6/ejuM/PB3+IywJ7eYOxChNltT0bXVCoHyj3FE6S+CX76A4B1L /Dj/5NsqOk6QXlI88FnAObW7Y1gkdwxcA97yKqYvdvbBatxss/eHeONrdqJfxbxXciTRYu9a/Wl +26ZE29FacamhCpDyZT4zIQKj4Pdh+vIseDAfc7aLy8qi3LgOoOHtrKKJbo6sVwLq7mUGj3cetM nGWwOGONMzMsy9GszwVGXbtjY3kQ9fKF4ry5gaqtIUsfBGeFowPVTsndy0xtee1AcPCDapeZbCu W8Khnk5bd89Cadk9QX6HKwMsaEEAjoy4a7uo0as2a1jzwTNoGQW0qzTo6l3NbX9D/XyVXOgGlmI /kK8k6+ow2C/INTSitD2OBOkVMJcxytOu9J5PjRYELD+V2lK4nY9F8vRHpl26pOw/92y1nCG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-08_05,2025-05-08_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 priorityscore=1501 suspectscore=0 clxscore=1015 adultscore=0 malwarescore=0 spamscore=0 impostorscore=0 mlxscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2505080145 On 4/29/2025 4:24 PM, Konrad Dybcio wrote: > On 4/29/25 11:24 AM, Prasad Kumpatla wrote: >> From: Mohammad Rafi Shaik >> >> Modify and enable WSA, VA, RX and TX lpass macros and lpass_tlmm clock >> settings. For audioreach solution mclk, npl and fsgen clocks are enabled >> through the q6prm clock driver. >> >> Signed-off-by: Mohammad Rafi Shaik >> Co-developed-by: Prasad Kumpatla >> Signed-off-by: Prasad Kumpatla >> --- >> .../boot/dts/qcom/qcs6490-audioreach.dtsi | 48 +++++++++++++++++++ >> 1 file changed, 48 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi >> index b11b9eea64c1..f3859d805ea7 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi >> @@ -11,6 +11,54 @@ >> #include >> #include >> >> +&lpass_rx_macro { >> + /delete-property/ power-domains; >> + /delete-property/ power-domain-names; >> + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >> + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > > TX -> RX? > > [...] > >> +&lpass_wsa_macro { >> + /delete-property/ power-domains; >> + /delete-property/ power-domain-names; >> + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >> + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > > TX -> WSA? For qcs6490 RX drives clk from TX CORE which is mandated from DSP side, Unlike sm8450 dedicated core clocks. Core TX clk is used for both RX and WSA as per DSP recommendations. Thanks, Prasad> > Konrad