From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC0582E2286; Tue, 23 Jun 2026 06:30:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782196202; cv=none; b=grTuC+coY7eQAKVqPDrgxbT2qp0qLfrcbOcZ0XvvQ3DUxqMgiRq5FVhjOiyyLOyi7Hegoy+xElt85t284CijXV4RcQDvrf2+V60nZ1g8oIAjKNdKxNu4IXFMyd6BCJZKSHzYWp5QcaTHdpF9Mhz+Rzk13fSj3+0Glz2txAPq2Us= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782196202; c=relaxed/simple; bh=Qdx5a9iUQGebN3w+Fdbxk3jxOx4w6gNk08MSL47w9VU=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Zj4ZB1iJpbVIfXDduFmFIeqADhjSyY5s+mRqfvYWuh/riBHGRI8+61BhUZQHAEsWpCCEh2yzpsihCVH3PTfPGGuy/G8tpKau4X34hMKVcgFHBDnzstBYZajtoSnOFBhiiRKNqEXG4vxB80zvcl6HJmQonWX1IeiJJ4K448h8AxE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nW7GIiVh; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nW7GIiVh" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E19A11F000E9; Tue, 23 Jun 2026 06:29:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1782196201; bh=3MiT/+6WIMBoDrjB7yxEcuzXbVSSLgfxY0V8WdRjNPU=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=nW7GIiVh06KBGnfpCQFiJ1b4voiSB5lYKFzhFwz83m1qokLLcDx8rElhuI4VBvnjH g+/mAs+YSgXe892UQlfMbnbzfRiM7eKDzi7aNnzUSdX4PgGEyZ0G6F4uagxct1NiHh Ont5Spf65R/sCjPi6ZZoconydm3GkKI0V0EmP9Q8Y9qs8qZYUfwwJYqtB3fwgmrxiS 0/d3ScEnD3irUqBqNtB+bXFhTFYRKLkccCbkfLelRewUUN0lXkjbjYSblVsFhMLtxL 5vACdLPBNLDCv0Tg2/oJowe++mul33FcKU8YzQ1RzOgPlmjtsR15ODhf0x9QbRBljE dyyKMDu1Nf55Q== Message-ID: <83333146-f53c-4673-bab8-01edf97a819e@kernel.org> Date: Tue, 23 Jun 2026 09:29:57 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 07/10] media: microchip-isc: fix pfe_cfg0_bps comment To: Balakrishnan.S@microchip.com, mchehab@kernel.org Cc: hverkuil@kernel.org, sakari.ailus@linux.intel.com, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260616-balki-isc-prefix-fixes-v1-v1-0-b23677fc5ab6@microchip.com> <20260616-balki-isc-prefix-fixes-v1-v1-7-b23677fc5ab6@microchip.com> <6ffd489e-8f24-47b2-bbfb-ac464798883f@kernel.org> From: Eugen Hristev Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 6/22/26 14:32, Balakrishnan.S@microchip.com wrote: > Hi Eugen, > > On 21/06/26 11:57 am, Eugen Hristev wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> On 6/16/26 14:51, Balakrishnan Sambath wrote: >>> The @pfe_cfg0_bps comment claimed the field holds the "number of >>> hardware data lines connected to the ISC". It does not. The field >>> stores the pre-shifted PFE_CFG0 BPS value (e.g. ISC_PFE_CFG0_BPS_EIGHT, >>> which is 0x4 << 28) and is ORed straight into the PFE_CFG0 register >>> word in microchip-isc-base.c. >>> >>> The old wording invites a reader to treat it as a small bit-depth >>> integer (8, 10, 12) and compare or do arithmetic on it directly, which >>> silently breaks since the value is shifted into bits 30:28. Document >>> what the field really holds and how to read the bit-depth back out with >>> FIELD_GET(ISC_PFE_CFG0_BPS_MASK, ...). >> >> In this commit message I would focus on the correct meaning of >> pfe_cfg0_bps and stop inferring what a reader *might* have understood. >> Let's just fix it to be right, explain the right way, and forget the >> wrong way. > > Sure. Will fix the comment to just say what the field holds. > >> >> But it looks like we could improve this to hold an actual meaningful >> data here, instead of a preshifted value, and rather shift it to the >> register when the hardware needs it. > > Yes that seems better. Will store the actual bps value and shift it at > the PFE_CFG0 write where its needed, will that work ? Try it out, and if it's better, yes, send it in the next version. If it's not looking good, reply with a snippet/reason why Eugen > > If so will fix both in next version. > > Thanks, > Balakrishnan > >> >> Eugen >> >>> >>> Signed-off-by: Balakrishnan Sambath >>> --- >>> drivers/media/platform/microchip/microchip-isc.h | 6 +++++- >>> 1 file changed, 5 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/media/platform/microchip/microchip-isc.h b/drivers/media/platform/microchip/microchip-isc.h >>> index f5e322c2e36b..b084459f4583 100644 >>> --- a/drivers/media/platform/microchip/microchip-isc.h >>> +++ b/drivers/media/platform/microchip/microchip-isc.h >>> @@ -62,7 +62,11 @@ struct isc_subdev_entity { >>> * @mbus_code: V4L2 media bus format code. >>> * @cfa_baycfg: If this format is RAW BAYER, indicate the type of bayer. >>> this is either BGBG, RGRG, etc. >>> - * @pfe_cfg0_bps: Number of hardware data lines connected to the ISC >>> + * @pfe_cfg0_bps: Pre-shifted ISC_PFE_CFG0 BPS field value (e.g. >>> + ISC_PFE_CFG0_BPS_EIGHT), not a plain bit-depth integer. >>> + OR it directly into the PFE_CFG0 register word, or use >>> + FIELD_GET(ISC_PFE_CFG0_BPS_MASK, ...) to obtain the >>> + 3-bit BPS field value. >>> * @raw: If the format is raw bayer. >>> */ >>> >>> >> >