From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: Dmitry Osipenko <digetx@gmail.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <frankc@nvidia.com>, <hverkuil@xs4all.nl>,
<sakari.ailus@iki.fi>, <helen.koike@collabora.com>
Cc: <sboyd@kernel.org>, <linux-media@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v11 6/9] media: tegra: Add Tegra210 Video input driver
Date: Mon, 4 May 2020 07:36:05 -0700 [thread overview]
Message-ID: <834b9295-d46a-dd01-2496-2c24a8e7a8e4@nvidia.com> (raw)
In-Reply-To: <f1cbb602-163e-a539-aaa5-c7e947a8945b@gmail.com>
On 5/4/20 12:44 AM, Dmitry Osipenko wrote:
> 30.04.2020 01:00, Sowjanya Komatineni пишет:
>> +/*
>> + * VI channel input data type enum.
>> + * These data type enum value gets programmed into corresponding Tegra VI
>> + * channel register bits.
>> + */
>> +enum tegra_image_dt {
>> + TEGRA_IMAGE_DT_YUV420_8 = 24,
>> + TEGRA_IMAGE_DT_YUV420_10,
>> +
>> + TEGRA_IMAGE_DT_YUV420CSPS_8 = 28,
>> + TEGRA_IMAGE_DT_YUV420CSPS_10,
>> + TEGRA_IMAGE_DT_YUV422_8,
>> + TEGRA_IMAGE_DT_YUV422_10,
>> + TEGRA_IMAGE_DT_RGB444,
>> + TEGRA_IMAGE_DT_RGB555,
>> + TEGRA_IMAGE_DT_RGB565,
>> + TEGRA_IMAGE_DT_RGB666,
>> + TEGRA_IMAGE_DT_RGB888,
>> +
>> + TEGRA_IMAGE_DT_RAW6 = 40,
>> + TEGRA_IMAGE_DT_RAW7,
>> + TEGRA_IMAGE_DT_RAW8,
>> + TEGRA_IMAGE_DT_RAW10,
>> + TEGRA_IMAGE_DT_RAW12,
>> + TEGRA_IMAGE_DT_RAW14,
>> +};
> Are these format IDs common to all Tegra SoCs or they unique to T210?
Common for all SoCs
next prev parent reply other threads:[~2020-05-04 14:35 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-29 21:59 [RFC PATCH v11 0/9] Add Tegra driver for video capture Sowjanya Komatineni
2020-04-29 21:59 ` [RFC PATCH v11 1/9] arm64: tegra: Fix sor powergate clocks and reset Sowjanya Komatineni
2020-04-29 21:59 ` [RFC PATCH v11 2/9] arm64: tegra: Add reset-cells to mc Sowjanya Komatineni
2020-04-29 22:00 ` [RFC PATCH v11 3/9] dt-bindings: clock: tegra: Add clk id for CSI TPG clock Sowjanya Komatineni
2020-04-29 22:00 ` [RFC PATCH v11 4/9] clk: tegra: Add Tegra210 CSI TPG clock gate Sowjanya Komatineni
2020-04-29 22:00 ` [RFC PATCH v11 5/9] dt-binding: tegra: Add VI and CSI bindings Sowjanya Komatineni
2020-04-29 22:00 ` [RFC PATCH v11 6/9] media: tegra: Add Tegra210 Video input driver Sowjanya Komatineni
2020-04-30 13:34 ` Dmitry Osipenko
2020-04-30 19:27 ` Sowjanya Komatineni
2020-04-30 13:38 ` Dmitry Osipenko
2020-04-30 19:32 ` Sowjanya Komatineni
2020-04-30 19:47 ` Dmitry Osipenko
2020-04-30 19:51 ` Sowjanya Komatineni
2020-04-30 13:43 ` Dmitry Osipenko
2020-04-30 13:46 ` Dmitry Osipenko
2020-04-30 13:56 ` Dmitry Osipenko
2020-04-30 14:02 ` Dmitry Osipenko
2020-04-30 14:13 ` Dmitry Osipenko
2020-04-30 16:04 ` Sowjanya Komatineni
2020-04-30 16:29 ` Sowjanya Komatineni
2020-04-30 17:06 ` Sowjanya Komatineni
2020-04-30 18:18 ` Sowjanya Komatineni
2020-04-30 19:09 ` Sowjanya Komatineni
2020-04-30 19:33 ` Dmitry Osipenko
2020-04-30 19:46 ` Sowjanya Komatineni
2020-04-30 19:53 ` Sowjanya Komatineni
2020-04-30 20:02 ` Sowjanya Komatineni
2020-04-30 21:17 ` Dmitry Osipenko
2020-04-30 21:26 ` Sowjanya Komatineni
2020-04-30 21:37 ` Sowjanya Komatineni
2020-04-30 21:53 ` Sowjanya Komatineni
2020-04-30 22:16 ` Sowjanya Komatineni
2020-04-30 22:19 ` Sowjanya Komatineni
2020-04-30 23:14 ` Sowjanya Komatineni
[not found] ` <fe7ebad6-0368-b1f0-4f58-648baa5e3f79@nvidia.com>
[not found] ` <4f095181-2338-3b71-316c-f8bbfc7865cc@nvidia.com>
[not found] ` <50e872bb-913a-7b47-3264-af6b1cedb0e2@nvidia.com>
[not found] ` <e17a8a49-be53-465d-f64c-3f4c77391d98@nvidia.com>
[not found] ` <da5154b4-85f9-3e56-a440-f75debaec3a8@nvidia.com>
[not found] ` <cbb047ae-97dc-8b9a-a5ba-8e2a5dab3771@nvidia.com>
[not found] ` <6ae2d00d-7955-d12b-5b56-955ef72ece26@nvidia.com>
2020-05-02 15:16 ` Dmitry Osipenko
2020-05-02 15:38 ` Sowjanya Komatineni
2020-05-02 16:03 ` Sowjanya Komatineni
2020-05-02 16:14 ` Sowjanya Komatineni
2020-05-02 16:55 ` Sowjanya Komatineni
2020-05-02 17:04 ` Sowjanya Komatineni
2020-05-02 19:14 ` Sowjanya Komatineni
2020-05-02 20:48 ` Dmitry Osipenko
2020-05-02 22:46 ` Sowjanya Komatineni
2020-05-03 0:03 ` Sowjanya Komatineni
2020-05-04 12:18 ` Hans Verkuil
2020-05-04 14:50 ` Sowjanya Komatineni
2020-04-30 21:22 ` Sowjanya Komatineni
[not found] ` <960d2715-a717-0cc3-df19-ff78dc426535@nvidia.com>
2020-05-04 15:53 ` Dmitry Osipenko
2020-05-04 15:56 ` Sowjanya Komatineni
2020-04-30 14:25 ` Dmitry Osipenko
2020-04-30 14:26 ` Dmitry Osipenko
2020-04-30 20:06 ` Dmitry Osipenko
2020-04-30 20:08 ` Sowjanya Komatineni
2020-04-30 20:09 ` Sowjanya Komatineni
2020-04-30 20:21 ` Dmitry Osipenko
2020-04-30 20:21 ` Sowjanya Komatineni
2020-05-04 7:44 ` Dmitry Osipenko
2020-05-04 14:36 ` Sowjanya Komatineni [this message]
2020-04-29 22:00 ` [RFC PATCH v11 7/9] MAINTAINERS: Add Tegra Video driver section Sowjanya Komatineni
2020-04-29 22:00 ` [RFC PATCH v11 8/9] dt-bindings: reset: Add ID for Tegra210 VI reset Sowjanya Komatineni
2020-04-29 22:00 ` [RFC PATCH v11 9/9] arm64: tegra: Add Tegra VI CSI support in device tree Sowjanya Komatineni
2020-04-30 9:59 ` [RFC PATCH v11 0/9] Add Tegra driver for video capture Hans Verkuil
2020-04-30 17:02 ` Sowjanya Komatineni
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