From: Krzysztof Kozlowski <krzk@kernel.org>
To: Sascha Hauer <s.hauer@pengutronix.de>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, kernel@pengutronix.de,
"Alvin Šipraga" <alsi@bang-olufsen.dk>
Subject: Re: [PATCH v2 2/3] dt-bindings: clock: add TI CDCE6214 binding
Date: Wed, 9 Apr 2025 13:55:01 +0200 [thread overview]
Message-ID: <836ffc93-5df8-48fe-8b5a-8d9b0bfa2794@kernel.org> (raw)
In-Reply-To: <20250409-clk-cdce6214-v2-2-40b25b722ecb@pengutronix.de>
On 09/04/2025 13:20, Sascha Hauer wrote:
> The CDCE6214 is a Ultra-Low Power Clock Generator With One PLL, Four
> Differential Outputs, Two Inputs, and Internal EEPROM. This patch adds
> the device tree binding for this chip.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> .../devicetree/bindings/clock/ti,cdce6214.yaml | 167 +++++++++++++++++++++
> include/dt-bindings/clock/ti,cdce6214.h | 24 +++
> 2 files changed, 191 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml
> new file mode 100644
> index 0000000000000..957e40403100d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml
> @@ -0,0 +1,167 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/ti,cdce6214.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI CDCE6214 programmable clock generator with PLL
> +
> +maintainers:
> + - Sascha Hauer <s.hauer@pengutronix.de>
> +
> +description:
> + Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs,
> + Two Inputs, and Internal EEPROM
> +
> + https://www.ti.com/product/CDCE6214
> +
> +properties:
> + compatible:
> + enum:
> + - ti,cdce6214
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
> + maxItems: 2
> +
> + clock-names:
> + minItems: 1
> + maxItems: 1
> + items:
> + enum: [ priref, secref ]
> +
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
> +
> + '#clock-cells':
> + const: 1
> +
> +patternProperties:
> + '^clk@[0-1]$':
> + type: object
> + description:
> + optional child node that can be used to specify input pin parameters. The reg
> + properties match the CDCE6214_CLK_* defines.
> +
> + additionalProperties: false
> +
> + properties:
> + reg:
> + description:
> + clock input identifier.
> + minimum: 0
> + maximum: 1
> +
> + ti,clkin-fmt:
> + description: |
> + Clock input format. Available options are:
> + 0 LVCMOS
> + 1 XTAL
> + 2 Differential
> + $ref: /schemas/types.yaml#/definitions/uint32
Drop, that's not string. Make it readable for DTS users.
> + minimum: 0
> + maximum: 2
> +
> + ti,xo-cload-femtofarad:
> + description:
> + Selects load cap for XO in femto Farad (fF). Up to 9000fF
> + $ref: /schemas/types.yaml#/definitions/uint32
Drop and use proper unit suffix from property-units in dtschema.
> + minimum: 3000
> + maximum: 9000
> +
> + ti,xo-bias-current-microampere:
> + description:
> + Bias current setting of the XO.
> + $ref: /schemas/types.yaml#/definitions/uint32
Ditto
> + minimum: 0
> + maximum: 1758
> +
> + '^clk@[2-9]$':
> + type: object
> + description:
> + optional child node that can be used to specify output pin parameters. The reg
> + properties match the CDCE6214_CLK_* defines.
> +
> + additionalProperties: false
> +
> + properties:
> + reg:
> + description:
> + clock output identifier.
> + minimum: 2
> + maximum: 9
> +
> + ti,clkout-fmt:
> + description: |
> + Clock input format. Available options are:
> + 0 CMOS
> + 1 LVDS
> + 2 LP-HCSL
Drop these three lines
> + $ref: /schemas/types.yaml#/definitions/uint32
Drop, this is supposed to be string.
enum: [ cmos, lvds, lp-hcsl ]
> + minimum: 0
> + maximum: 2
> +
> + ti,cmos-mode:
> + description: |
> + CMOS output mode. Available options are:
> + 0 disabled
> + 1 high polarity
> + 2 low polarity
> + first array entry is for the CMOSP pin, second for the CMOSN pin
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + minItems: 2
> + maxItems: 2
> + items:
> + maximum: 2
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + clock-generator@67 {
> + compatible = "ti,cdce6214";
> + reg = <0x67>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #clock-cells = <1>;
> + clocks = <&clock_ref25m>;
> + clock-names = "secref";
> +
> + clk@1 {
> + reg = <1>; // CDCE6214_CLK_SECREF
> + ti,clkin-fmt = <1>; // XTAL
> + };
> +
> + clk@3 {
> + reg = <3>; // CDCE6214_CLK_OUT1
> + ti,clkout-fmt = <0>; // CMOS
> + ti,cmos-mode = <1 2>; // CMOSP = highpol, CMOSN = lowpol
Why do you need comments here? If you chosen magic numbers, it means
they are readable by themself. If you need comments, then it is a sign
they are not obvious and just go with the code I asked you - enum string.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-04-09 11:55 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-09 11:20 [PATCH v2 0/3] clk: add support for TI CDCE6214 Sascha Hauer
2025-04-09 11:20 ` [PATCH v2 1/3] clk: make determine_rate optional for non reparenting clocks Sascha Hauer
2025-04-09 11:20 ` [PATCH v2 2/3] dt-bindings: clock: add TI CDCE6214 binding Sascha Hauer
2025-04-09 11:55 ` Krzysztof Kozlowski [this message]
2025-04-09 11:20 ` [PATCH v2 3/3] clk: add TI CDCE6214 clock driver Sascha Hauer
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