From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
To: Linux Doc Mailing List <linux-doc@vger.kernel.org>
Cc: Mauro Carvalho Chehab <mchehab@s-opensource.com>,
Mauro Carvalho Chehab <mchehab@infradead.org>,
linux-kernel@vger.kernel.org, Jonathan Corbet <corbet@lwn.net>
Subject: [PATCH v2 29/31] io_ordering.txt: standardize document format
Date: Sat, 17 Jun 2017 12:25:48 -0300 [thread overview]
Message-ID: <837073af0c9606c0c5c266480c56d198c588e656.1497713142.git.mchehab@s-opensource.com> (raw)
In-Reply-To: <f0f77a106d183325dce9eecd3c11214154050e11.1497713142.git.mchehab@s-opensource.com>
In-Reply-To: <f0f77a106d183325dce9eecd3c11214154050e11.1497713142.git.mchehab@s-opensource.com>
Each text file under Documentation follows a different
format. Some doesn't even have titles!
Change its representation to follow the adopted standard,
using ReST markups for it to be parseable by Sphinx:
- Add a title;
- mark literal-blocks as such.
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
---
Documentation/io_ordering.txt | 62 +++++++++++++++++++++++--------------------
1 file changed, 33 insertions(+), 29 deletions(-)
diff --git a/Documentation/io_ordering.txt b/Documentation/io_ordering.txt
index 9faae6f26d32..2ab303ce9a0d 100644
--- a/Documentation/io_ordering.txt
+++ b/Documentation/io_ordering.txt
@@ -1,3 +1,7 @@
+==============================================
+Ordering I/O writes to memory-mapped addresses
+==============================================
+
On some platforms, so-called memory-mapped I/O is weakly ordered. On such
platforms, driver writers are responsible for ensuring that I/O writes to
memory-mapped addresses on their device arrive in the order intended. This is
@@ -8,39 +12,39 @@ critical section of code protected by spinlocks. This would ensure that
subsequent writes to I/O space arrived only after all prior writes (much like a
memory barrier op, mb(), only with respect to I/O).
-A more concrete example from a hypothetical device driver:
+A more concrete example from a hypothetical device driver::
- ...
-CPU A: spin_lock_irqsave(&dev_lock, flags)
-CPU A: val = readl(my_status);
-CPU A: ...
-CPU A: writel(newval, ring_ptr);
-CPU A: spin_unlock_irqrestore(&dev_lock, flags)
- ...
-CPU B: spin_lock_irqsave(&dev_lock, flags)
-CPU B: val = readl(my_status);
-CPU B: ...
-CPU B: writel(newval2, ring_ptr);
-CPU B: spin_unlock_irqrestore(&dev_lock, flags)
- ...
+ ...
+ CPU A: spin_lock_irqsave(&dev_lock, flags)
+ CPU A: val = readl(my_status);
+ CPU A: ...
+ CPU A: writel(newval, ring_ptr);
+ CPU A: spin_unlock_irqrestore(&dev_lock, flags)
+ ...
+ CPU B: spin_lock_irqsave(&dev_lock, flags)
+ CPU B: val = readl(my_status);
+ CPU B: ...
+ CPU B: writel(newval2, ring_ptr);
+ CPU B: spin_unlock_irqrestore(&dev_lock, flags)
+ ...
In the case above, the device may receive newval2 before it receives newval,
-which could cause problems. Fixing it is easy enough though:
+which could cause problems. Fixing it is easy enough though::
- ...
-CPU A: spin_lock_irqsave(&dev_lock, flags)
-CPU A: val = readl(my_status);
-CPU A: ...
-CPU A: writel(newval, ring_ptr);
-CPU A: (void)readl(safe_register); /* maybe a config register? */
-CPU A: spin_unlock_irqrestore(&dev_lock, flags)
- ...
-CPU B: spin_lock_irqsave(&dev_lock, flags)
-CPU B: val = readl(my_status);
-CPU B: ...
-CPU B: writel(newval2, ring_ptr);
-CPU B: (void)readl(safe_register); /* maybe a config register? */
-CPU B: spin_unlock_irqrestore(&dev_lock, flags)
+ ...
+ CPU A: spin_lock_irqsave(&dev_lock, flags)
+ CPU A: val = readl(my_status);
+ CPU A: ...
+ CPU A: writel(newval, ring_ptr);
+ CPU A: (void)readl(safe_register); /* maybe a config register? */
+ CPU A: spin_unlock_irqrestore(&dev_lock, flags)
+ ...
+ CPU B: spin_lock_irqsave(&dev_lock, flags)
+ CPU B: val = readl(my_status);
+ CPU B: ...
+ CPU B: writel(newval2, ring_ptr);
+ CPU B: (void)readl(safe_register); /* maybe a config register? */
+ CPU B: spin_unlock_irqrestore(&dev_lock, flags)
Here, the reads from safe_register will cause the I/O chipset to flush any
pending writes before actually posting the read to the chipset, preventing
--
2.9.4
next prev parent reply other threads:[~2017-06-17 15:43 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-17 15:25 [PATCH v2 01/31] bcache.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 02/31] bt8xxgpio.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 03/31] btmrvl.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 04/31] bus-virt-phys-mapping.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 05/31] cachetlb.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 06/31] circular-buffers.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 07/31] clk.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 08/31] cpu-load: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 09/31] cputopology.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 10/31] crc32.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 11/31] dcdbas.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 12/31] digsig.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 13/31] DMA-API.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 14/31] DMA-API-HOWTO.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 15/31] DMA-attributes.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 16/31] DMA-ISA-LPC.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 17/31] debugging-via-ohci1394.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 18/31] efi-stub.txt: " Mauro Carvalho Chehab
2017-06-20 7:02 ` Ard Biesheuvel
2017-06-17 15:25 ` [PATCH v2 19/31] eisa.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 20/31] flexible-arrays.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 21/31] futex-requeue-pi.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 22/31] gcc-plugins.txt: " Mauro Carvalho Chehab
2017-06-19 18:58 ` Kees Cook
2017-06-17 15:25 ` [PATCH v2 23/31] highuid.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 24/31] hw_random.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 25/31] hwspinlock.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 26/31] intel_txt.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 27/31] Intel-IOMMU.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 28/31] io-mapping.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` Mauro Carvalho Chehab [this message]
2017-06-17 15:25 ` [PATCH v2 30/31] iostats.txt: " Mauro Carvalho Chehab
2017-06-17 15:25 ` [PATCH v2 31/31] iostats.txt: update it to cover recent Kernels Mauro Carvalho Chehab
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