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Sat, 31 Jan 2026 16:41:49 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ThreadId: AFQOcv9bxohg Date: Sat, 31 Jan 2026 21:41:29 +0000 From: "Jiaxun Yang" To: "Rong Zhang" , "Thomas Bogendoerfer" Cc: "Rong Zhang" , =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , "linux-mips@vger.kernel.org" , linux-kernel@vger.kernel.org Message-Id: <83760d87-151f-4947-9af5-6b4572d5a5d4@app.fastmail.com> In-Reply-To: <20260131214003.833520-1-rongrong@oss.cipunited.com> References: <20260131214003.833520-1-rongrong@oss.cipunited.com> Subject: Re: [PATCH 0/2] MIPS: Loongson2ef: Use pcibios_align_resource() to block io range Content-Type: text/plain Content-Transfer-Encoding: 7bit On Sat, 31 Jan 2026, at 9:32 PM, Rong Zhang wrote: > Loongson2ef reserves io range below 0x4000 (LOONGSON_PCI_IO_START) while > ISA-mode only IDE controller on the south bridge still has a hard > dependency on ISA IO ports. > > The reservation was done by lifting loongson_pci_io_resource.start onto > 0x4000. Prior to commit ae81aad5c2e1 ("MIPS: PCI: Use > pci_enable_resources()"), the arch specific pcibios_enable_resources() > did not check if the resources were claimed, which diverges from what > PCI core checks, effectively hiding the fact that IDE IO resources were > not properly within the resource tree. After starting to use > pcibios_enable_resources() from PCI core, enabling IDE controller fails: > > pata_cs5536 0000:00:0e.2: BAR 0 [io 0x01f0-0x01f7]: not claimed; > can't enable device > pata_cs5536 0000:00:0e.2: probe with driver pata_cs5536 failed with > error -22 > > MIPS PCI code already has support for enforcing lower bounds using > PCIBIOS_MIN_IO in pcibios_align_resource() without altering the IO > window start address itself. Register PCI controller in plat_mem_setup() > instead of arch_initcall() to make it the root of other resources (e.g., > i8259) and prevent resource conflicts. Then, make Loongson2ef PCI code > use PCIBIOS_MIN_IO too. > > Rong Zhang (2): > MIPS: Loongson2ef: Register PCI controller in early stage > MIPS: Loongson2ef: Use pcibios_align_resource() to block io range Acked-by: Jiaxun Yang > > .../include/asm/mach-loongson2ef/loongson.h | 6 ++++++ > arch/mips/loongson2ef/common/pci.c | 18 +++++++++++------- > arch/mips/loongson2ef/common/setup.c | 1 + > 3 files changed, 18 insertions(+), 7 deletions(-) > > > base-commit: ad9a728a3388dc5f66eab6b7135e0154249e9403 > -- > 2.51.0 -- - Jiaxun