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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2beb58dba7bsm143296905ad.66.2026.05.27.02.28.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 May 2026 02:28:22 -0700 (PDT) Message-ID: <8398e275-8d57-48c6-bbf7-f82f423b0a39@oss.qualcomm.com> Date: Wed, 27 May 2026 17:28:18 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] dt-bindings: ufs: Document static TX Equalization settings properties From: Can Guo To: Manivannan Sadhasivam Cc: bvanassche@acm.org, beanhuo@micron.com, peter.wang@mediatek.com, martin.petersen@oracle.com, linux-scsi@vger.kernel.org, Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ram Kumar Dwivedi , Zhaoming Luo , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list References: <20260523134711.323425-1-can.guo@oss.qualcomm.com> <20260523134711.323425-2-can.guo@oss.qualcomm.com> <96962564-ff25-4d81-a605-3d9c05fa000a@oss.qualcomm.com> <1cd587f0-d571-4bd8-a8c0-97248e732cec@oss.qualcomm.com> Content-Language: en-US In-Reply-To: <1cd587f0-d571-4bd8-a8c0-97248e732cec@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=VY3H+lp9 c=1 sm=1 tr=0 ts=6a16b938 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=YG64nluAAAAA:20 a=L2ds4eLAk9dUaZRLGA8A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 a=bA3UWDv6hWIuX7UZL3qL:22 X-Proofpoint-ORIG-GUID: 4xIPo27qlMKEHlBOxTbYqBpkRks1sdLG X-Proofpoint-GUID: 4xIPo27qlMKEHlBOxTbYqBpkRks1sdLG X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI3MDA5MCBTYWx0ZWRfXyHg1dsA3cqwZ PU9WW2kX3H8kIk1/r2k0a2e4MRsMtJjiR3FzBAMBZoxnnM+PSLEMIawwBE9QTLecl6jky9WcHIn aLvYzUSZaxts6kUwk7sSFfFK+qzBSOAkPZw3vf4do/1ZalEBvWhT+OXFsHK0nrfPlKHqL6tdWA2 m/EC6Vbz6mhUlCYI24nrggWKazOvI6KRU8ypiqfJECdcxNCWWMBo/kgiGZAHihKQx/ZZeOqK+Ry Akt9WvNyB2/v95Lbups4/Djpr/UL8uXqYz6y3rgOJevBOLIX3+NxOeJ2kJCsVFng5cF9UrMKSUi vZhfswCprORxJsP1Kh+8ObhBQvI2pwIY9Y4vACUNNczAJgWxUuFOwaMWY44xLMAKnP1EHStXdCq b5ykwN78Pm+jiENb/oTGPavWmxf4v6zt8qBHSmdzndafftODXVOGYgAm0GjUVtUhgUW0890tzcu 3xZRH3uQ3aoY6GPyYVQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-05-27_01,2026-05-26_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 adultscore=0 clxscore=1015 impostorscore=0 phishscore=0 malwarescore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605270090 On 5/27/2026 5:24 PM, Can Guo wrote: > > > On 5/27/2026 5:15 PM, Manivannan Sadhasivam wrote: >> On Wed, May 27, 2026 at 04:51:04PM +0800, Can Guo wrote: >>> Hi Mani, >>> >>> On 5/23/2026 10:14 PM, Manivannan Sadhasivam wrote: >>>> On Sat, May 23, 2026 at 06:47:10AM -0700, Can Guo wrote: >>>>> UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro >>>>> v3.0 >>>>> and M-PHY v6.0. In these specs, TX Equalization is defined for all >>>>> High >>>>> Speed Gears (not only HS-G6) to compensate channel loss and >>>>> improve signal >>>>> integrity at high speed operation. >>>>> >>>>> For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be >>>>> required depending on channel characteristics. >>>>> >>>>> Add vendor-neutral DT patternProperties: >>>>> txeq-settings-g[1-6] >>>>> >>>>> Each property is a uint32 array of per-lane tuples: >>>>> (PreShoot, DeEmphasis, PrecodeEn) >>>>> >>>> I don't think combining all EQ settings (PreShoot, DeEmphasis, >>>> PrecodeEn) in a >>>> single property as opaque tuples is the right approach. These are >>>> three >>>> semantically distinct parameters with independent value ranges. So >>>> packing >>>> them into a uint32 array makes validation impossible in the schema. >>>> >>>> AFACIS, PrecodeEn is applicable only to HS-G6 (PAM4), but the proposed >>>> patternProperties forces it into G1-G5 tuples as well, which is >>>> semantically >>>> wrong. >>> Point taken for the PrecodeEn. >>>> PCIe binding defines one property per data rate for EQ presets: >>>> https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/pci/pci-bus-common.yaml#L193 >>>> >>>> >>>> Similarly, UFS should define one property per gear per (like, >>>> txeq-preshoot-g6, >>>> txeq-deemphasis-g6, txeq-precode-enable-g6,...) rather than >>>> clubbing everything >>>> into opaque tuples. >>> Thanks for the suggestion. I will go with below approach: >>> >>> txeq-preshoot-g6 = >> Host Lane >>> 1 PreShoot, Device Lane 1 PreShoot>; >>> txeq-deemphasis-g6 = >> DeEmphasis, Host >>> Lane 1 DeEmphasis, Device Lane 1 DeEmphasis>; >>> txeq-precode-en-g6 = >> PrecodeEn, Host >>> Lane 1 PrecodeEn, Device Lane 1 PrecodeEn>; >>> >> How about encoding Host and Device values in a single tuple. Like, >> >>     txeq-preshoot-g6 = , > 1...>, > Man, I don't like that way to be honest, it took me a few minutes to > understand it on the PCIe side... > > Let's go with my approach please... I misunderstood your point. I thought you meant the 0x5555 vs 0x55 stuffs in PCIe side. I am OK to go with single tuple approach as you suggested, which is more readable. Thanks, Can Guo. > Thanks, > Can Guo. >> >> - Mani >> >