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Tue, 16 Jul 2024 09:51:29 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-568-g843fbadbe-fm-20240701.003-g843fbadb Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <83ac6b91-c7f1-4b18-a522-8188d6d1298b@app.fastmail.com> In-Reply-To: <20240716132603.GA3136577@thelio-3990X> References: <20240711120115.4069401-1-vattunuru@marvell.com> <20240716132603.GA3136577@thelio-3990X> Date: Tue, 16 Jul 2024 15:51:08 +0200 From: "Arnd Bergmann" To: "Nathan Chancellor" , "Vamsi Attunuru" Cc: "Greg Kroah-Hartman" , linux-kernel@vger.kernel.org Subject: Re: [PATCH] misc: Kconfig: add a new dependency for MARVELL_CN10K_DPI Content-Type: text/plain On Tue, Jul 16, 2024, at 15:26, Nathan Chancellor wrote: > On Thu, Jul 11, 2024 at 05:01:15AM -0700, Vamsi Attunuru wrote: >> > > After this change, ARCH=arm allmodconfig fails with: > > drivers/misc/mrvl_cn10k_dpi.c: In function 'dpi_reg_write': > drivers/misc/mrvl_cn10k_dpi.c:190:9: error: implicit declaration of > function 'writeq'; did you mean 'writeb'? > [-Wimplicit-function-declaration] > 190 | writeq(val, dpi->reg_base + offset); > | ^~~~~~ > | writeb > drivers/misc/mrvl_cn10k_dpi.c: In function 'dpi_reg_read': > drivers/misc/mrvl_cn10k_dpi.c:195:16: error: implicit declaration of > function 'readq'; did you mean 'readb'? > [-Wimplicit-function-declaration] > 195 | return readq(dpi->reg_base + offset); > | ^~~~~ > | readb > > Including one of the io-64-nonatomic headers would resolve this but I am > not sure which one would be appropriate (or perhaps the dependency > should be tightened to requiring 64BIT, as some other drivers have > done). Right, a dependency on 64BIT makes sense here. The alternative is to include linux/io-64-nonatomic-hi-lo.h or linux/io-64-nonatomic-lo-hi.h in order to have a replacement readq/writeq implementation that works on 32-bit architectures. However, doing this requires understanding whether what the side-effects of accessing the 64-bit registers are and whether they require writing the upper or lower half of the register last. Arnd