RE: [PATCH] serial: tegra: Map the iir register to default defines

[Shardar Mohammed <smohammed@nvidia.com>]

Verification failed on Tegra.
Fix here is, IIR should be masked with UART_IIR_MASK  after reading the IIR register as on Tegra bit-6 is used for internal usage to know if FIFO mode is enabled.
        while (1) {
                iir = tegra_uart_read(tup, UART_IIR);
	 +iir &= UART_IIR_MASK;

Thanks,
Shardar

-----Original Message-----
From: Laxman Dewangan 
Sent: Thursday, March 30, 2017 3:48 PM
To: Olliver Schinagl <oliver@schinagl.nl>; Greg Kroah-Hartman <gregkh@linuxfoundation.org>; Jiri Slaby <jslaby@suse.com>; Stephen Warren <swarren@wwwdotorg.org>; Thierry Reding <thierry.reding@gmail.com>; Alexandre Courbot <gnurou@gmail.com>
Cc: linux-serial@vger.kernel.org; linux-tegra@vger.kernel.org; linux-kernel@vger.kernel.org; Shardar Mohammed <smohammed@nvidia.com>
Subject: Re: [PATCH] serial: tegra: Map the iir register to default defines


On Thursday 30 March 2017 12:18 AM, Olliver Schinagl wrote:
> The tegra serial IP seems to be following the common layout and the 
> interrupt ID's match up nicely. Replace the magic values to match the 
> common serial_reg defines, with the addition of the Tegra unique End 
> of Data interrupt.
>
> Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
> ---

Adding Shardar for verifications.

Acked-by: Laxman Dewangan <ldewangan@nvidia.com>