From: Damien Le Moal <dlemoal@kernel.org>
To: Yang Zi <2959243019@qq.com>,
cassel@kernel.org, linux-ide@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ata: pata_pdc2027x: fix division by zero in pdc_adjust_pll
Date: Fri, 28 Aug 2026 14:48:06 +0900 [thread overview]
Message-ID: <8418baf3-4a3c-4011-ba5d-a9c2e4ea893b@kernel.org> (raw)
In-Reply-To: <tencent_FA2F5F31DC5009EFE7B38D19D754AA6C4507@qq.com>
On 8/25/26 17:32, Yang Zi wrote:
> pdc_adjust_pll() divides pout_required by pll_clock_khz before checking
> that pll_clock_khz is within the valid range. If the PLL input clock is
> less than 1000 Hz, pll_clock_khz is 0 and the division triggers a
> divide-by-zero error.
>
> Move the sanity check ahead of the division so the invalid input is
> rejected before the ratio is computed.
>
> Signed-off-by: Yang Zi <2959243019@qq.com>
This is needs a fixes tag I think.
Other than that, looks OK.
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
--
Damien Le Moal
Western Digital Research
prev parent reply other threads:[~2026-08-28 5:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-25 8:32 Yang Zi
2026-08-28 5:48 ` Damien Le Moal [this message]
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