From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2437DC7EE24 for ; Tue, 6 Jun 2023 17:30:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238542AbjFFRaI (ORCPT ); Tue, 6 Jun 2023 13:30:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37136 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238749AbjFFRaF (ORCPT ); Tue, 6 Jun 2023 13:30:05 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 15D5B10F0 for ; Tue, 6 Jun 2023 10:30:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686072604; x=1717608604; h=message-id:date:mime-version:subject:to:references:from: in-reply-to:content-transfer-encoding; bh=H+4zbG4OFfWvL2qhgJOK+pD0Hi5SD6cUhTNXoIf9reI=; b=CVvPozXnXJ0GzrCyE7r4KqV2tKQcCzb2BAuNHx98E9SJk9F3FT2uCkF8 1nxuPKEr1hnHAosOjGatBn09TTUbtKqf1gCOdKyJHycttJmZs526j3daj s8npNzlu9U8KRSUwd4XAu6PAkslFALIlNWQnvLeFqzpqnKgT5kbbittG2 y5bWR4FmX2Bbd9Z/LnMJQNR1kOD/Pa6/mGU6+JdVAYtGU8XZ2yu8DuxoE WlEzIkgWvK9iFHP97QHCzoWwcA1ly4zie6drma6FQ6Ibc581sCBrGMtlt 4e/or11AggjBttd0nbNXEMbC5PUDVTLxSjAJoVX/Jw82N1X1kcEFiuNTY Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10733"; a="360065767" X-IronPort-AV: E=Sophos;i="6.00,221,1681196400"; d="scan'208";a="360065767" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jun 2023 10:28:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10733"; a="955852093" X-IronPort-AV: E=Sophos;i="6.00,221,1681196400"; d="scan'208";a="955852093" Received: from hganapat-mobl1.amr.corp.intel.com (HELO [10.212.191.102]) ([10.212.191.102]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jun 2023 10:28:41 -0700 Message-ID: <84292c84-6f12-2df5-dc4c-3a7abc6659ea@intel.com> Date: Tue, 6 Jun 2023 10:28:40 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [RFC PATCH] x86/cpu: Update Intel model naming rule Content-Language: en-US To: kan.liang@linux.intel.com, tony.luck@intel.com, peterz@infradead.org, dave.hansen@linux.intel.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org References: <20230606170257.3213720-1-kan.liang@linux.intel.com> From: Dave Hansen In-Reply-To: <20230606170257.3213720-1-kan.liang@linux.intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/6/23 10:02, kan.liang@linux.intel.com wrote: > * MICROARCH Is the code name for the micro-architecture for this core. > * N.B. Not the platform name. > + * PROCESSOR Is the code name for the processor I think we should refine the definition of "MICROARCH" here. We want it to refer to the combination of cores, not just "this core". ALDERLAKE is a fine name to refer to a processor that has a mix of "Golden Cove / Gracemont" cores. Let's just have it say: * MICROARCH Is the code name for the collection of micro- architectures for this processor. N.B. Not the platform name.