Re: PIC probing code from e179f6914152 failing

[Mario Limonciello <mario.limonciello@amd.com>]

On 10/23/2023 12:50, Thomas Gleixner wrote:
> On Mon, Oct 23 2023 at 11:17, Mario Limonciello wrote:
>> On 10/23/2023 10:59, Thomas Gleixner wrote:
>>>> IOW NULL pic case has IORESOURCE_DISABLED / IORESOURCE_UNSET
>>>
>>> So the real question is WHY are the DISABLED/UNSET flags not set in the
>>> PIC case?
> 
> Do you have an answer for this?

Here's the problematic call path:

acpi_dev_get_irqresource()
->acpi_register_gsi()
->->__acpi_register_gsi() [ Which is acpi_register_gsi_ioapic() ]
->->->mp_map_gsi_to_irq()
->->->->mp_map_pin_to_irq()
->->->->->mp_check_pin_attr()

In the legacy PIC programmed case this function can overwrite level and 
active when acpi_register_gsi() is called.

Without the change I made in the NULL PIC case it can't.
So the resources get disabled by acpi_dev_get_irqresource().

>   
>>>> NULL case:
>>>> handler:  handle_edge_irq
>>>> dstate:   0x3740c208
>>>>                IRQ_TYPE_LEVEL_LOW
>>>>
>>>> PIC case:
>>>> handler:  handle_fasteoi_irq
>>>> dstate:   0x3740e208
>>>>                IRQ_TYPE_LEVEL_LOW
>>>>                IRQD_LEVEL
>>>>
>>>> I guess something related to the callpath for mp_register_handler().
>>>
>>> Guessing is not helpful.
>>>
>>> There is a difference in how the allocation info is set up when legacy
>>> PIC is enabled, but that does not explain the above resource flag
>>> difference.
>>
>> I did a pile of printks and that's how I realized it's because of the
>> missing call to mp_register_handler() which is dependent upon what
>> appeared to me to be a superfluous number of legacy IRQs check (patch 1
>> in my solution).
> 
> What exactly is superfluous about these legacy checks?
> 
> Thanks,
> 
>          tglx

acpi_dev_get_irqresource() tries to set up to match what's in _CRS.
If acpi_register_gsi() fails, the resource can't get setup.