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Thu, 5 Nov 2026 21:41:27 -0800 From: Alok Kumar To: , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v4 02/32] gpu: nova-core: gsp: pass boot context through setup helpers Date: Fri, 6 Nov 2026 11:09:35 +0530 Message-ID: <84b6a7a0ea19beb962aac6205c6bb03881d1eba4.1793906667.git.alkumar@nvidia.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000D894D:EE_|MW6PR12MB8949:EE_ X-MS-Office365-Filtering-Correlation-Id: 943fc82e-7ed0-486d-3c26-08df3bc8a8d6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|1800799024|7416014|376014|23010399003|18002099003|22082099003|6133799003|10067099003|3023799007|56012099006|11063799006|261026140227099003|261022115727099003|261102123227099003|261028144727099003|261009223027099003|261022075727099003|261021123027099003|261021121427099003|261022105027099003|261026121527099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0urtoRsDMO1XC5z1r3QBoL4NCenv2xyD1Rzt2UUgX4A52FGenPaXXLDV7FXmpYlO6+ZnINUrc3pN/cBWBvKEjoawh1lFjCsK2KSyxxKj5gdeIPv9qt/v9ezAAvCbLyXfFDJwrkdmUfKEZ+y02gXdCkuJTSEXNjfI99ILCLumILnaqUFyNujmVB43D/B3tMPOPtCivI4SUOgwmvIWMk3qUCmF3Pqj6zOBiRf5u3S/Ma+BxHmXyL+VOYfWHUVVBk/E1iNseFN3wdC8KR4Fk8U/Dzq/YfTkkqMzTYDeZhxBD6nboWJFhV7bfCDtv11cQBlqGWmskDcE0G1i9ViG7qcsrgx9qWRcUUQtzwtn8q9PCzNbIpNa63Z/8HACIu4r2qZ3hTZKg+XObeyPMXjPqn1LwW0Aof00/Bx0/x3IYPHexKWhYEMe1OdDW1Btq3y3ZVf2 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Nov 2026 05:41:52.1399 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 943fc82e-7ed0-486d-3c26-08df3bc8a8d6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000D894D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB8949 From: Zhi Wang The GSP boot paths pass the device, chipset, BAR and vGPU state to the VRAM layout and GSP_INIT helpers as separate arguments. These values are already available in GspBootContext, and some are forwarded again to the WPR2 heap and VF topology helpers. Pass the boot context through these helpers so each can read the fields it needs. This simplifies the helper signatures and their call sites. No functional change is intended. Cc: Alexandre Courbot Signed-off-by: Zhi Wang Signed-off-by: Alok Kumar --- drivers/gpu/nova-core/fb.rs | 26 +++++++++----------- drivers/gpu/nova-core/gsp/boot.rs | 8 +++--- drivers/gpu/nova-core/gsp/commands/gmc.rs | 17 ++++--------- drivers/gpu/nova-core/gsp/fw/commands.rs | 30 ++++++++++------------- drivers/gpu/nova-core/gsp/hal/gh100.rs | 2 +- drivers/gpu/nova-core/gsp/hal/tu102.rs | 2 +- 6 files changed, 34 insertions(+), 51 deletions(-) diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs index 5ceb7760c78e..26e94d908b77 100644 --- a/drivers/gpu/nova-core/fb.rs +++ b/drivers/gpu/nova-core/fb.rs @@ -174,13 +174,9 @@ pub(crate) struct FbRanges { impl FbRanges { /// Computes concrete framebuffer ranges required on non-FSP booting architectures. - pub(crate) fn new( - chipset: Chipset, - bar: Bar0<'_>, - gsp_fw: &GspFirmware<'_>, - vgpu_state: VgpuState, - ) -> Result { - let hal = hal::fb_hal(chipset); + pub(crate) fn new(ctx: &gsp::GspBootContext<'_, '_>, gsp_fw: &GspFirmware<'_>) -> Result { + let bar = ctx.bar; + let hal = hal::fb_hal(ctx.chipset); let fb = { let fb_size = hal.vidmem_size(bar); @@ -242,7 +238,7 @@ pub(crate) fn new( FbRange(fw_image_addr..fw_image_addr + fw_image_size) }; - let (vf_partition_count, wpr2_heap_size) = wpr2_heap_params(chipset, vgpu_state, fb.end)?; + let (vf_partition_count, wpr2_heap_size) = wpr2_heap_params(ctx, fb.end)?; let wpr2_heap = { const WPR2_HEAP_DOWN_ALIGN: Alignment = Alignment::SZ_1M; @@ -298,11 +294,11 @@ pub(crate) fn wpr2_range(bar: Bar0<'_>) -> Option> { } /// Computes the number of VF partitions and the WPR2 heap size from the vGPU state. -fn wpr2_heap_params(chipset: Chipset, vgpu_state: VgpuState, fb_size: u64) -> Result<(u8, u64)> { - Ok(match vgpu_state { +fn wpr2_heap_params(ctx: &gsp::GspBootContext<'_, '_>, fb_size: u64) -> Result<(u8, u64)> { + Ok(match ctx.vgpu.state() { VgpuState::Disabled => ( 0, - gsp::LibosParams::from_chipset(chipset).wpr_heap_size(chipset, fb_size)?, + gsp::LibosParams::from_chipset(ctx.chipset).wpr_heap_size(ctx.chipset, fb_size)?, ), VgpuState::Enabled { total_vfs } => ( u8::try_from(total_vfs.get()).map_err(|_| EINVAL)?, @@ -328,10 +324,10 @@ pub(crate) struct FbSizes { impl FbSizes { /// Computes the framebuffer region sizes for GSP-FMC boot. - pub(crate) fn new(chipset: Chipset, bar: Bar0<'_>, vgpu_state: VgpuState) -> Result { - let hal = hal::fb_hal(chipset); - let fb_size = hal.vidmem_size(bar); - let (vf_partition_count, wpr2_heap_size) = wpr2_heap_params(chipset, vgpu_state, fb_size)?; + pub(crate) fn new(ctx: &gsp::GspBootContext<'_, '_>) -> Result { + let hal = hal::fb_hal(ctx.chipset); + let fb_size = hal.vidmem_size(ctx.bar); + let (vf_partition_count, wpr2_heap_size) = wpr2_heap_params(ctx, fb_size)?; Ok(Self { frts_size: hal.frts_size(), diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/boot.rs index 072b00e9c2bf..72353270fce6 100644 --- a/drivers/gpu/nova-core/gsp/boot.rs +++ b/drivers/gpu/nova-core/gsp/boot.rs @@ -526,11 +526,9 @@ pub(crate) fn boot( bootloader_app_version: gsp_fw.bootloader.app_version, libos_dma_handle: self.libos.dma_address(), }; - let static_info = self - .cmdq - .send_gmc_command(GspInit::new(pdev, chipset, ctx.vgpu.state())?, |event| { - load_exec.dispatch_gmc_boot_event(event) - })?; + let static_info = self.cmdq.send_gmc_command(GspInit::new(ctx)?, |event| { + load_exec.dispatch_gmc_boot_event(event) + })?; Ok(super::BootResult { unload_bundle: unload_guard.dismiss().1, diff --git a/drivers/gpu/nova-core/gsp/commands/gmc.rs b/drivers/gpu/nova-core/gsp/commands/gmc.rs index 3ff44c867288..890462beb11f 100644 --- a/drivers/gpu/nova-core/gsp/commands/gmc.rs +++ b/drivers/gpu/nova-core/gsp/commands/gmc.rs @@ -6,14 +6,11 @@ use core::convert::Infallible; use kernel::{ - device, - pci, prelude::*, transmute::AsBytes, // }; use crate::{ - gpu::Chipset, gsp::{ cmdq::{ gmc::{ @@ -38,9 +35,9 @@ Schema, UnknownKeyPolicy, // }, + GspBootContext, // }, - sbuffer::SBufferIter, - vgpu::VgpuState, // + sbuffer::SBufferIter, // }; /// The `GSP_INIT` command, which carries the system information and registry keys to GSP-RM. @@ -52,7 +49,7 @@ pub(crate) struct GspInit { } impl GspInit { - /// Builds the request for `pdev`. + /// Builds the request using the device, chipset and vGPU state from `ctx`. /// /// # Errors /// @@ -60,13 +57,9 @@ impl GspInit { /// - `ENODEV` if vGPU mode is enabled but the SR-IOV capability is missing. /// /// Errors reading the PCI configuration or decoding the VF BAR layout are propagated as-is. - pub(crate) fn new( - pdev: &pci::Device, - chipset: Chipset, - vgpu_state: VgpuState, - ) -> Result { + pub(crate) fn new(ctx: &GspBootContext<'_, '_>) -> Result { let mut encoder = Encoder::new(); - GspInitRequest::new(pdev, chipset, vgpu_state)?.encode(&mut encoder)?; + GspInitRequest::new(ctx)?.encode(&mut encoder)?; Ok(Self { payload: encoder.finish(), diff --git a/drivers/gpu/nova-core/gsp/fw/commands.rs b/drivers/gpu/nova-core/gsp/fw/commands.rs index f196a56dd7ee..689b7417597a 100644 --- a/drivers/gpu/nova-core/gsp/fw/commands.rs +++ b/drivers/gpu/nova-core/gsp/fw/commands.rs @@ -6,7 +6,6 @@ use kernel::{ alloc::ArrayVec, bitfield, - device, pci, prelude::*, transmute::{ @@ -16,7 +15,6 @@ }; use crate::{ - gpu::Chipset, gsp::{ commands::GspStaticInfo, nvkv::{ @@ -29,6 +27,7 @@ Required, TruncatingArray, // }, + GspBootContext, // }, vgpu::VgpuState, // }; @@ -229,16 +228,14 @@ struct DomainBusDevice(u64) { ]; impl GspInitRequest { - fn build_vf_info( - dev: &pci::Device, - vgpu_state: VgpuState, - ) -> Result> { - let total_vfs = match vgpu_state { + fn build_vf_info(ctx: &GspBootContext<'_, '_>) -> Result> { + let total_vfs = match ctx.vgpu.state() { VgpuState::Disabled => return Ok(None), VgpuState::Enabled { total_vfs } => total_vfs, }; - let sriov = dev + let sriov = ctx + .pdev .config_space_extended()? .find_ext_capability::()? .ok_or(ENODEV)?; @@ -261,10 +258,10 @@ fn build_vf_info( })) } - /// Creates the request for `dev`. + /// Creates the request using the device, chipset and vGPU state from `ctx`. /// - /// The registry keys are [`REGISTRY_ENTRIES`], plus `RMSetSriovMode` when `vgpu_state` reports - /// that vGPU is enabled. + /// The registry keys are [`REGISTRY_ENTRIES`], plus `RMSetSriovMode` when the boot context + /// reports that vGPU is enabled. /// /// # Errors /// @@ -272,11 +269,10 @@ fn build_vf_info( /// - `ENODEV` if vGPU mode is enabled but the SR-IOV capability is missing. /// /// Errors reading the PCI configuration or decoding the VF BAR layout are propagated as-is. - pub(crate) fn new( - dev: &pci::Device, - chipset: Chipset, - vgpu_state: VgpuState, - ) -> Result { + pub(crate) fn new(ctx: &GspBootContext<'_, '_>) -> Result { + let dev = ctx.pdev; + let chipset = ctx.chipset; + let vgpu_state = ctx.vgpu.state(); let mut regkeys = KVVec::new(); for &(name, value) in REGISTRY_ENTRIES { regkeys.push(RegKey::new(name, value), GFP_KERNEL)?; @@ -304,7 +300,7 @@ pub(crate) fn new( host_arch: HostArch::host().into(), bus_device_func: u64::from(bus_device_func).into(), regkeys, - vf_info: Self::build_vf_info(dev, vgpu_state)?, + vf_info: Self::build_vf_info(ctx)?, }) } } diff --git a/drivers/gpu/nova-core/gsp/hal/gh100.rs b/drivers/gpu/nova-core/gsp/hal/gh100.rs index 91201b51030e..f91cdd061706 100644 --- a/drivers/gpu/nova-core/gsp/hal/gh100.rs +++ b/drivers/gpu/nova-core/gsp/hal/gh100.rs @@ -151,7 +151,7 @@ fn boot<'gpu>( let chipset = ctx.chipset; let gsp_falcon = ctx.gsp_falcon; - let fb_sizes = FbSizes::new(chipset, ctx.bar, ctx.vgpu.state())?; + let fb_sizes = FbSizes::new(ctx)?; dev_dbg!(dev, "{:#x?}\n", fb_sizes); let wpr_meta = diff --git a/drivers/gpu/nova-core/gsp/hal/tu102.rs b/drivers/gpu/nova-core/gsp/hal/tu102.rs index f8a7b8d9f36f..a7639a98e60a 100644 --- a/drivers/gpu/nova-core/gsp/hal/tu102.rs +++ b/drivers/gpu/nova-core/gsp/hal/tu102.rs @@ -260,7 +260,7 @@ fn boot<'gpu>( let gsp_falcon = ctx.gsp_falcon; let sec2_falcon = ctx.sec2_falcon; - let fb_ranges = FbRanges::new(chipset, bar, gsp_fw, ctx.vgpu.state())?; + let fb_ranges = FbRanges::new(ctx, gsp_fw)?; dev_dbg!(dev, "{:#x?}\n", fb_ranges); // Declared before the unload guard so that if Booter fails while running, SEC2 is reset -- 2.53.0