From: Jayesh Choudhary <j-choudhary@ti.com>
To: Andrew Davis <afd@ti.com>, Nishanth Menon <nm@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 4/4] arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node
Date: Tue, 30 Aug 2022 15:34:15 +0530 [thread overview]
Message-ID: <84eb85c7-a960-996b-3c7a-3538df8d54dd@ti.com> (raw)
In-Reply-To: <20220823001136.10944-4-afd@ti.com>
On 23/08/22 05:41, Andrew Davis wrote:
> J7200 has an instance of SA2UL in the MCU domain.
> Add DT node for the same.
>
> The device is marked TI_SCI_PD_SHARED as parts of this IP are also
> shared with the security co-processor and OP-TEE.
>
> The RNG node is added but marked disabled as it is firewalled off for
> exclusive use by OP-TEE. Any access to this device from Linux will
> result in firewall errors. We add the node for completeness of the
> hardware description.
>
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
> .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 20 +++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index ff13bbeed30c..e5be78a58682 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -375,4 +375,24 @@ mcu_r5fss0_core1: r5f@41400000 {
> ti,loczrama = <1>;
> };
> };
> +
> + mcu_crypto: crypto@40900000 {
> + compatible = "ti,j721e-sa2ul";
> + reg = <0x00 0x40900000 0x00 0x1200>;
> + power-domains = <&k3_pds 265 TI_SCI_PD_SHARED>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
> + dmas = <&mcu_udmap 0xf501>, <&mcu_udmap 0x7502>,
> + <&mcu_udmap 0x7503>;
> + dma-names = "tx", "rx1", "rx2";
> + dma-coherent;
> +
> + rng: rng@40910000 {
> + compatible = "inside-secure,safexcel-eip76";
> + reg = <0x00 0x40910000 0x00 0x7d>;
> + interrupts = <GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled"; /* Used by OP-TEE */
> + };
> + };
> };
Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com>
next prev parent reply other threads:[~2022-08-30 10:08 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-23 0:11 [PATCH v2 1/4] arm64: dts: ti: k3-am65-main: Disable RNG node Andrew Davis
2022-08-23 0:11 ` [PATCH v2 2/4] arm64: dts: ti: k3-am65-main: Move SA2UL to unused PSI-L thread ID Andrew Davis
2022-08-30 9:57 ` Jayesh Choudhary
2022-08-23 0:11 ` [PATCH v2 3/4] arm64: dts: ti: k3-am65-main: Do not exclusively claim SA2UL Andrew Davis
2022-08-30 10:01 ` Jayesh Choudhary
2022-08-23 0:11 ` [PATCH v2 4/4] arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node Andrew Davis
2022-08-30 10:04 ` Jayesh Choudhary [this message]
2022-08-30 9:54 ` [PATCH v2 1/4] arm64: dts: ti: k3-am65-main: Disable RNG node Jayesh Choudhary
2022-09-09 9:56 ` Vignesh Raghavendra
-- strict thread matches above, loose matches on Subject: below --
2022-07-06 19:08 Andrew Davis
2022-07-06 19:08 ` [PATCH v2 4/4] arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node Andrew Davis
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