Re: include/linux/compiler_types.h:597:38: error: call to '__compiletime_assert_437' declared with attribute error: FIELD_PREP: value too large for the field

[Marek Vasut <marek.vasut@mailbox.org>]

On 12/5/25 11:16 AM, kernel test robot wrote:
> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> head:   2061f18ad76ecaddf8ed17df81b8611ea88dbddd
> commit: 4f716a1db661cfb31502a0a6d7e62c06daf2e603 drm/rcar-du: dsi: Convert register bitfields to GENMASK() macro
> date:   5 weeks ago
> config: arc-randconfig-001-20251205 (https://download.01.org/0day-ci/archive/20251205/202512051834.bESvhDiG-lkp@intel.com/config)
> compiler: arc-linux-gcc (GCC) 8.5.0
> reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251205/202512051834.bESvhDiG-lkp@intel.com/reproduce)
> 
> If you fix the issue in a separate patch/commit (i.e. not just a new version of
> the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <lkp@intel.com>
> | Closes: https://lore.kernel.org/oe-kbuild-all/202512051834.bESvhDiG-lkp@intel.com/
> 
> All errors (new ones prefixed by >>):
> 
>     In file included from <command-line>:
>     drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c: In function 'rcar_mipi_dsi_startup.isra.4':
>>> include/linux/compiler_types.h:597:38: error: call to '__compiletime_assert_437' declared with attribute error: FIELD_PREP: value too large for the field

[...]

>     rcar_mipi_dsi.c:660:14: note: in expansion of macro 'VCLKSET_DIV_V4H'
>        vclkset |= VCLKSET_DIV_V4H(__ffs(setup_info.vclk_divider) - 1);
>                   ^~~~~~~~~~~~~~~
I don't think this condition can occur.

In drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c :
- rcar_mipi_dsi_startup() calls rcar_mipi_dsi_parameters_calc() which is 
the only site that assigns setup_info.vclk_divider this way:

  415         switch (dsi->info->model) {
  416         case RCAR_DSI_V3U:
  417         default:
  418                 setup_info->vclk_divider = 1 << 
((clk_cfg->vco_cntrl >> 4) & 0x3);
  419                 break;
  420
  421         case RCAR_DSI_V4H:
  422                 setup_info->vclk_divider = 1 << 
(((clk_cfg->vco_cntrl >> 3) & 0x7) + 1);
  423                 break;
  424         }

In case of V3U, vclk_divider is 1 << (0..3) .
In case of V4H, vclk_divider is 1 << (1..8) .

In drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c :
- rcar_mipi_dsi_startup() later contains the offending code:

  653         switch (dsi->info->model) {
  654         case RCAR_DSI_V3U:
  655         default:
  656                 vclkset |= 
VCLKSET_DIV_V3U(__ffs(setup_info.vclk_divider));
  657                 break;
  658
  659         case RCAR_DSI_V4H:
  660                 vclkset |= 
VCLKSET_DIV_V4H(__ffs(setup_info.vclk_divider) - 1);
  661                 break;
  662         }

This does the reverse of the code that assigned the value above, so:

In case of V3U, field value is (0..3) .
In case of V4H, field value is (0..7) .

Finally in drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h :

256 #define VCLKSET_DIV_V3U_MASK            GENMASK_U32(5, 4)
257 #define VCLKSET_DIV_V3U(n) 
FIELD_PREP(VCLKSET_DIV_V3U_MASK, (n))
258 #define VCLKSET_DIV_V4H_MASK            GENMASK_U32(6, 4)
259 #define VCLKSET_DIV_V4H(n) 
FIELD_PREP(VCLKSET_DIV_V4H_MASK, (n))

The masks fit exactly. For V3U the mask is 2-bit, or V4H the mask is 3-bit .

...

I can however rewrite the code in this way, which should also mitigate 
this warning. Do you think this makes the code any better ?

diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c 
b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c
index 4ef2e3c129ed7..20e2a4cae5b86 100644
--- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c
+++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c
@@ -84,7 +84,6 @@ struct dsi_setup_info {
  	unsigned long fout;
  	u16 m;
  	u16 n;
-	u16 vclk_divider;
  	const struct dsi_clk_config *clkset;
  };

@@ -338,7 +337,8 @@ rcar_mipi_dsi_post_init_phtw_v4h(struct 
rcar_mipi_dsi *dsi,
  static void rcar_mipi_dsi_pll_calc(struct rcar_mipi_dsi *dsi,
  				   unsigned long fin_rate,
  				   unsigned long fout_target,
-				   struct dsi_setup_info *setup_info)
+				   struct dsi_setup_info *setup_info,
+				   u16 vclk_divider)
  {
  	unsigned int best_err = -1;
  	const struct rcar_mipi_dsi_device_info *info = dsi->info;
@@ -391,6 +391,7 @@ static void rcar_mipi_dsi_parameters_calc(struct 
rcar_mipi_dsi *dsi,
  	unsigned long fin_rate;
  	unsigned int i;
  	unsigned int err;
+	u16 vclk_divider;

  	/*
  	 * Calculate Fout = dot clock * ColorDepth / (2 * Lane Count)
@@ -415,15 +416,15 @@ static void rcar_mipi_dsi_parameters_calc(struct 
rcar_mipi_dsi *dsi,
  	switch (dsi->info->model) {
  	case RCAR_DSI_V3U:
  	default:
-		setup_info->vclk_divider = 1 << ((clk_cfg->vco_cntrl >> 4) & 0x3);
+		vclk_divider = 1 << ((clk_cfg->vco_cntrl >> 4) & 0x3);
  		break;

  	case RCAR_DSI_V4H:
-		setup_info->vclk_divider = 1 << (((clk_cfg->vco_cntrl >> 3) & 0x7) + 1);
+		vclk_divider = 1 << (((clk_cfg->vco_cntrl >> 3) & 0x7) + 1);
  		break;
  	}

-	rcar_mipi_dsi_pll_calc(dsi, fin_rate, fout_target, setup_info);
+	rcar_mipi_dsi_pll_calc(dsi, fin_rate, fout_target, setup_info, 
vclk_divider);

  	/* Find hsfreqrange */
  	setup_info->hsfreq = setup_info->fout * 2;
@@ -439,7 +440,7 @@ static void rcar_mipi_dsi_parameters_calc(struct 
rcar_mipi_dsi *dsi,
  	dev_dbg(dsi->dev,
  		"Fout = %u * %lu / (%u * %u * %u) = %lu (target %lu Hz, error 
%d.%02u%%)\n",
  		setup_info->m, fin_rate, dsi->info->n_mul, setup_info->n,
-		setup_info->vclk_divider, setup_info->fout, fout_target,
+		vclk_divider, setup_info->fout, fout_target,
  		err / 100, err % 100);

  	dev_dbg(dsi->dev,
@@ -653,11 +654,11 @@ static int rcar_mipi_dsi_startup(struct 
rcar_mipi_dsi *dsi,
  	switch (dsi->info->model) {
  	case RCAR_DSI_V3U:
  	default:
-		vclkset |= VCLKSET_DIV_V3U(__ffs(setup_info.vclk_divider));
+		vclkset |= VCLKSET_DIV_V3U((clk_cfg->vco_cntrl >> 4) & 0x3);
  		break;

  	case RCAR_DSI_V4H:
-		vclkset |= VCLKSET_DIV_V4H(__ffs(setup_info.vclk_divider) - 1);
+		vclkset |= VCLKSET_DIV_V4H((clk_cfg->vco_cntrl >> 3) & 0x7);
  		break;
  	}