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[83.9.1.184]) by smtp.gmail.com with ESMTPSA id z9-20020ac25de9000000b004d39af98af6sm783983lfq.81.2023.02.17.13.45.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 17 Feb 2023 13:45:26 -0800 (PST) Message-ID: <8547e66d-504d-3e1c-9356-3c5f1618ac91@linaro.org> Date: Fri, 17 Feb 2023 22:45:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.2 Subject: Re: [PATCH v2 03/14] drm/msm/a6xx: Introduce GMU wrapper support Content-Language: en-US To: Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org Cc: marijn.suijten@somainline.org, Rob Clark , Abhinav Kumar , Sean Paul , David Airlie , Daniel Vetter , Akhil P Oommen , Geert Uytterhoeven , Douglas Anderson , Chia-I Wu , dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20230214173145.2482651-1-konrad.dybcio@linaro.org> <20230214173145.2482651-4-konrad.dybcio@linaro.org> <1c2f6e03-8b16-1ee2-bdbd-8f84219acb36@linaro.org> From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17.02.2023 22:44, Dmitry Baryshkov wrote: > On 17/02/2023 23:41, Konrad Dybcio wrote: >> >> >> On 17.02.2023 22:37, Dmitry Baryshkov wrote: >>> On 14/02/2023 19:31, Konrad Dybcio wrote: >>>> Some (particularly SMD_RPM, a.k.a non-RPMh) SoCs implement A6XX GPUs >>>> but don't implement the associated GMUs. This is due to the fact that >>>> the GMU directly pokes at RPMh. Sadly, this means we have to take care >>>> of enabling & scaling power rails, clocks and bandwidth ourselves. >>>> >>>> Reuse existing Adreno-common code and modify the deeply-GMU-infused >>>> A6XX code to facilitate these GPUs. This involves if-ing out lots >>>> of GMU callbacks and introducing a new type of GMU - GMU wrapper. >>>> This is essentially a register region which is convenient to model >>>> as a device. We'll use it for managing the GDSCs. >>> >>> Why do you call it a wrapper? >> That's what Qualcomm calls it.. The GMU-less GPUs have (almost) all the >> same GMU GX/CX registers as the real GMUs in this 'wrapper' region, so >> that lets us reuse some code with gmu_(read/write/rmw) calls. >> > > Ack. If you can add this to the commit message, it would be great. Sure! I spent so much time on this that I can't really tell what's obvious and what's not anymore, heh. Konrad >