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From: Sibi Sankar <quic_sibis@quicinc.com>
To: Konrad Dybcio <konrad.dybcio@linaro.org>, <sudeep.holla@arm.com>,
	<cristian.marussi@arm.com>, <andersson@kernel.org>,
	<jassisinghbrar@gmail.com>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>
Cc: <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <quic_rgottimu@quicinc.com>,
	<quic_kshivnan@quicinc.com>, <conor+dt@kernel.org>,
	Amir Vajid <avajid@quicinc.com>
Subject: Re: [RFC 4/7] soc: qcom: Utilize qcom scmi vendor protocol for bus dvfs
Date: Mon, 1 Jul 2024 14:14:05 +0530	[thread overview]
Message-ID: <854f324d-c9dc-affc-6f6f-0219bcbc1e1b@quicinc.com> (raw)
In-Reply-To: <027b9ba8-20b7-4d20-8128-156398f21902@linaro.org>



On 6/19/24 01:07, Konrad Dybcio wrote:
> 
> 
> On 2/12/24 11:33, Sibi Sankar wrote:
> 
> [...]
> 
> 
>>>
>>>> +            monitor->mon_type = (of_property_read_bool(monitor_np, 
>>>> "qcom,compute-mon")) ? 1 : 0;
>>>> +            monitor->ipm_ceil = (of_property_read_bool(monitor_np, 
>>>> "qcom,compute-mon")) ? 0 : 20000000;
>>>
>>> What does it even mean for a monitor to be a compute mon?
>>>
>>
>> When a monitor is marked compute-mon it means that the table is
>> followed religiously irrespective whether the instruction per miss
>> count threshold (ipm) is exceeded or not. Equivalent to having
>> a cpufreq map -> l3/DDR bw mapping upstream.
> 
> I'm sorta puzzled why the OS would even be required to program this, since
> L3/DDR/CPU frequencies are known by various stages of boot and secure 
> firmware
> too.
> 
> What happens if we omit this? Is the default configuration identical to 
> this?
> Or does it need explicit enabling?

CPUCP isn't expected to know the various ranges supported by the memory
buses it can vote on and from a sandboxing perspective one would want to
control what CPUCP has access to as well. It also can't arrive at the
exact values just from the OPP tables we pass on as well. So it doesn't
have any default values to start off with. For all these reasons, they
need explicit setting up and without it, the algorithm wouldn't function
as expected.

-Sibi

> 
> Konrad

  reply	other threads:[~2024-07-01  8:44 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-17 17:34 [RFC 0/7] firmware: arm_scmi: Qualcomm Vendor Protocol Sibi Sankar
2024-01-17 17:34 ` [RFC 1/7] dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings Sibi Sankar
2024-01-17 19:53   ` Konrad Dybcio
2024-02-08 10:22     ` Sibi Sankar
2024-02-08 23:14       ` Konrad Dybcio
2024-02-12  5:48         ` Sibi Sankar
2024-01-30 17:12   ` Rob Herring
2024-02-08 10:28     ` Sibi Sankar
2024-02-08 15:58       ` Krzysztof Kozlowski
2024-02-28 17:37     ` Konrad Dybcio
2024-01-17 17:34 ` [RFC 2/7] mailbox: Add support for QTI CPUCP mailbox controller Sibi Sankar
2024-01-17 19:03   ` Dmitry Baryshkov
2024-01-17 17:34 ` [RFC 3/7] firmware: arm_scmi: Add QCOM vendor protocol Sibi Sankar
2024-01-17 19:09   ` Dmitry Baryshkov
2024-02-12  8:31     ` Sibi Sankar
2024-01-17 20:15   ` Konrad Dybcio
2024-01-17 20:31     ` Cristian Marussi
2024-02-08 11:44     ` Sibi Sankar
2024-02-09 22:45       ` Konrad Dybcio
2024-02-12  8:56         ` Sibi Sankar
2024-01-17 20:15   ` Konrad Dybcio
2024-01-18 17:22   ` Sudeep Holla
2024-02-12  9:14     ` Sibi Sankar
2024-02-12 17:39   ` Cristian Marussi
2024-02-29 14:16     ` Sudeep Holla
2024-02-29 14:24   ` Sudeep Holla
2024-01-17 17:34 ` [RFC 4/7] soc: qcom: Utilize qcom scmi vendor protocol for bus dvfs Sibi Sankar
2024-01-17 20:28   ` Konrad Dybcio
2024-02-12 10:33     ` Sibi Sankar
2024-06-18 19:37       ` Konrad Dybcio
2024-07-01  8:44         ` Sibi Sankar [this message]
2024-07-12 12:20           ` Konrad Dybcio
2024-01-17 20:41   ` Dmitry Baryshkov
2024-02-12 10:24     ` Sibi Sankar
2024-02-12 13:22       ` Dmitry Baryshkov
2024-02-20 15:07       ` Cristian Marussi
2024-02-28 17:31         ` Sibi Sankar
2024-02-29 14:27       ` Sudeep Holla
2024-02-20 16:19   ` Cristian Marussi
2024-02-29 14:41     ` Sudeep Holla
2024-01-17 17:34 ` [RFC 5/7] arm64: dts: qcom: x1e80100: Add cpucp mailbox and sram nodes Sibi Sankar
2024-01-17 17:34 ` [RFC 6/7] arm64: dts: qcom: x1e80100: Enable cpufreq Sibi Sankar
2024-01-18 15:25   ` Sudeep Holla
2024-02-12  9:28     ` Sibi Sankar
2024-01-17 17:34 ` [RFC 7/7] arm64: dts: qcom: x1e80100: Enable LLCC/DDR dvfs Sibi Sankar
2024-01-17 20:38   ` Konrad Dybcio
2024-02-12 10:05     ` Sibi Sankar
2024-01-17 20:47   ` Dmitry Baryshkov
2024-02-12  9:47     ` Sibi Sankar
2024-02-12 18:11 ` [RFC 0/7] firmware: arm_scmi: Qualcomm Vendor Protocol Cristian Marussi

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